Motorola PowerQUICC II MPC8280 Series Reference Manual page 1406

Ports Tables
Table 41-6 shows the port B pin assignments.
Table 41-6. Port B Dedicated Pin Assignment (PPARB = 1)
Pin
PDIRB = 1 (Output)
PB31 FCC2: TX_ER
MII
1
PB30 FCC2: TxSOC
UTOPIA
1
PB29 FCC2: RxClav
UTOPIA slave
PB28 FCC2: RTS
1
PB27 FCC2: TxD[0]
UTOPIA 8
1
PB26 FCC2: TxD[1]
UTOPIA 8
1
PB25 FCC2: TxD[4]
UTOPIA 8
FCC2: TxD[3]
MII/HDLC nibble
1
PB24 FCC2: TxD[5]
UTOPIA 8
FCC2: TxD[2]
MII/HDLC nibble
1
PB23 FCC2: TxD[6]
UTOPIA
FCC2: TxD[1]
MII/HDLC nibble
FCC2: TxD[1]
RMII dibit
1
PB22 FCC2: TxD[7]
UTOPIA
FCC2: TxD[0]
MII/HDLC nibble
FCC2: TxD[0]
RMII dibit
FCC2: TxD
HDLC/transp. serial
41-12
Freescale Semiconductor, Inc.
PSORB = 0
Default
PDIRB = 0 (Input)
Input
1
FCC2: RxSOC GND
UTOPIA
FCC2: RX_DV GND
MII
FCC2: CRS_DV
RMII
1
FCC2: RxClav GND
UTOPIA master
FCC2: RX_ER GND
MII/RMII
FCC2: COL GND
MII
FCC2: CRS GND
MII
TDM_A1: L1RXD[3] GND
Nibble
TDM_A1: L1RXD[2] GND
Nibble
TDM_A1: L1RXD[1] GND
Nibble
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Pin Function
PDIRB = 1 (Output)
FCC2: TX_EN
MII/RMII
SCC1: TXD
TDM_A1: L1TXD[3]
Nibble
PSORB = 1
PDIRB = 0 (Input or Default
Inout if Specified) Input
TDM_B2: L1TXD GND
Inout
TDM_B2: L1RXD GND
Inout
TDM_B2: L1RSYNC GND
TDM_B2: GND
L1TSYNC/GRANT
TDM_C2: L1TXD GND
Inout
TDM_C2: L1RXD GND
Inout
TDM_C2: GND
L1TSYNC/GRANT
TDM_C2: L1RSYNC GND
TDM_D2: L1TXD GND
Inout
TDM_D2: L1RXD GND
Inout
MOTOROLA