Motorola PowerQUICC II MPC8280 Series Reference Manual page 1074

ATM Memory Structure
Table 31-23. AAL1 Protocol-Specific TCT Field Descriptions (continued)
Offset Bits Name
0x14 0–3 SRTS_TMP Before a cell with SN = 1 is sent, the CP reads the SRTS code from external SRTS logic,
4–15 SP
31.10.2.3.3 AAL0 Protocol-Specific TCT
Figure 31-33 shows the AAL0 protocol-specific TCT.
0
Offset + 0x10
Offset + 0x12
Offset + 0x14
Table 31-24 describes AAL0 protocol-specific TCT fields.
Table 31-24. AAL0-Specific TCT Field Descriptions
Offset Bits
0x10 0–7
8
9
10
11
12–15
0x12–0x14 —
31.10.2.3.4 AAL1 CES Protocol-Specific TCT
Refer to Section 32.9.2.1, "AAL1 CES Protocol-Specific TCT."
31.10.2.3.5 AAL2 Protocol-Specific TCT
Refer to Section 33.3.5.1, "AAL2 Protocol-Specific TCT."
31-60
Freescale Semiconductor, Inc.
writes it to SRTS_TMP, and then inserts SRTS_TMP into the next four cells with an odd
SN.
Structured pointer. Used by the CP to calculate the structured pointer. Should be cleared
initially. Structured format only.
—
Figure 31-33. AAL0 Protocol-Specific TCT
Name
— Reserved, should be cleared.
0 Must be 0.
CR10 CRC-10
0 CRC10 insertion is disabled.
1 CRC10 insertion is enabled.
— Reserved, should be cleared.
ACHC ATM cell header change
0 Normal operation ATM cell header is taken from AAL0 buffer.
1 VPI/VCI (28 bits) are taken from TCT.
— Reserved, should be cleared.
— Reserved, should be cleared.
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Description
7 8 9 10 11
0 CR10 — ACHC
—
Description
12 15
—
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