Motorola PowerQUICC II MPC8280 Series Reference Manual page 1208

AAL2 Exceptions
33.7 AAL2 Exceptions
For each VC, four circular interrupt queues are available. By programming RCT[INTQ]
and TCT[INTQ] for each VC, the user assigns an interrupt queue number.
When one of the CIDs generates an interrupt request, the CP writes a new entry to the
interrupt queue containing the ATM channel number, the CID and a description of the
exception. Because CID = 0 is a unique CID number, it is used to specify that the event is
related to the VC rather than the CID. As with all ATM exceptions, the valid (V) bit is then
set and INTQ_PTR is incremented. When INTQ_PTR reaches a location with the W bit set,
it wraps to the first entry in the queue. More details can be found in Section 31.11, "ATM
Exceptions."
An interrupt entry for a CID is shown in Figure 33-23.
0 1
Offset + 0x00 V —
Offset + 0x02
Figure 33-23. AAL2 Interrupt Queue Entry CID ≠ 0
33-40
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2 3
W
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10
CID
Channel Code (CC)
11 12 13 14
TBNR RXB BSY TXB RXF
MOTOROLA
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