Motorola PowerQUICC II MPC8280 Series Reference Manual page 1096

ATM Memory Structure
31.10.5.12 AAL0 TxBDs
Figure 31-52 shows AAL0 TxBDs. Note that the data length field is calculated internally
as 52 bytes, plus the extra header length (defined in FPSMR[TEHS]) when in UDC mode.
0 1
Offset + 0x00 R —
Offset + 0x02
Offset + 0x04
Offset + 0x06
Table 31-40 describes AAL0 TxBD fields.
Offset Bits Name
0x00 0 R
1 —
2 W
3 I
4–5 —
6 CM
7–10 —
11 OAM
11–15 —
0x02 — —
0x04 — TXDBPTR Tx data buffer pointer. Points to the address of the associated buffer, which may or may
31-82
Freescale Semiconductor, Inc.
2 3 4 5
W I — CM
Tx Data Buffer Pointer (TXDBPTR)
Figure 31-52. AAL0 TxBDs
Table 31-40. AAL0 TxBD Field Descriptions
Ready
0 The buffer is not ready for transmission. The user can manipulate this BD or its buffer.
The CP clears R after the buffer has been sent or after an error occurs.
1 The buffer that the user prepared for transmission has not been sent or is being sent.
No fields of this BD may be written by the user once R is set.
Reserved, should be cleared.
Wrap (final BD in table)
0 Not the last BD in the TxBD table.
1 Last BD in the TxBD table. After this buffer is used, the CP sends outgoing data from
the first BD in the table (the BD pointed to by the channel's TCT[TBD_BASE]). The
number of TxBDs in this table is determined by the W bit. The current table is
constrained to 64 Kbytes.
Interrupt
0 No interrupt is generated after this buffer has been serviced.
1 A Tx buffer event is sent to the interrupt queue after this buffer is serviced.
FCCE[GINTx] is set when the INT_CNT counter reaches the global interrupt threshold.
Reserved, should be cleared.
Continuous mode
0 Normal operation.
1 The CP does not clear the ready bit after this BD is closed, allowing the associated
buffer to be retransmitted automatically when the CP next accesses this BD.
Reserved, should be cleared.
Operation and maintenance cell. If OAM is set, the current AAL0 buffer contains an F5 or
F4 OAM cell. Performance monitoring calculations are not done on OAM cells.
Reserved, should be cleared.
Reserved, should be cleared.
not be 8-byte-aligned. The buffer may reside in either internal or external memory. This
value is not modified by the CP.
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
6 7 10
—
—
Description
11 12 15
OAM —
MOTOROLA