Motorola PowerQUICC II MPC8280 Series Reference Manual page 1040

Available Bit Rate (ABR) Flow Control
Figure 31-13. ABR Transmit Flow (continued)
31-26
Freescale Semiconductor, Inc.
B-RM/DATA In Rate Cell Tx
Turn-around
No
and
(First-turn or not
data-in-queue)
Yes
CI-TA = CI-TA || CI-VC
Send RM cell (DIR = backwards, CCR-TA, ER-TA, MCR-TA,
CI-TA, NI-TA, CLP=0)
CI-VC = 0
Turn-around = first-turn = FALSE
Count = Count+1
EXIT
Send Data Cell
CLP = EFCI = 0
Count = Count+1
Schedule:Time_to_send = Now+1/ACR
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Destination End-Sys 1,2,3,4
B-RM In Rate Cell Tx
Data Cell Tx
EXIT
MOTOROLA