Motorola PowerQUICC II MPC8280 Series Reference Manual page 1033

Table 31-5 gives an example of VP-level table entry address calculation.
Table 31-5. VP-Level Table Entry Address Calculation Example
VPT_BASE VP-Level Table Size
0x0024_0000 64 entries
Figure 31-7 shows the VP pointer address compression from Table 31-5.
PHY+VPI
VP_MASK
VP Pointer
Figure 31-7. VP Pointer Address Compression
31.4.2.2 VC-Level Address Compression Tables (VCLTs)
Each VPLT entry points to a single VCLT. Like the VPLT, the size of each VCLT depends
on VC_MASK. Because the VCLT contains word entries, if VC_MASK =
0b11_1111_1111, the table is 4 Kbytes. The address of an entry in this table is VCT_BASE
+ VCOFFSET × 4 + VCpointer × 4.
The MPC8280 can check that all unallocated VCI bits are 0 by setting GMODE[CUAB]
(check unallocated bits). If they are not, the cell is considered a misinserted cell.
An example of VC-level table entry address calculation is shown in Table 31-6. Note that
VCOFFSET is assumed to be 0x100 for this example.
Table 31-6. VC-Level Table Entry Address Calculation Example
VCT_BASE VCOffset
0x0084_0000 0x0100
MOTOROLA Chapter 31. ATM Controller and AAL0, AAL1, and AAL5
Freescale Semiconductor, Inc.
VP_MASK
0x0237
0 0 0 0 0 0
0 0 0 0 0 0
VC-Level Table Size VC_MASK
32 entries 0x0037
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VCI/VPI Address Lookup Mechanism
PHY+VPI VP Pointer
0x0011 0x09
0 0 0 0 0 1
1 0 0 0 1 1
0 0
VCI VC Pointer
0x0031 0x19
VP Entry Address
VP Base = 0x240000
0x09 x 4 = 0x000024
0x240024
0 0 0 1
0 1 1 1
1 0 0 1
VC Entry Address
VC Base = 0x840000
0x100 x 4 = 0x000400
0x19 x 4 = 0x000064
0x840464
31-19