Motorola PowerQUICC II MPC8280 Series Reference Manual page 791

22.14.6 HDLC Bus Protocol Programming
The HDLC bus on the MPC8280 is implemented using the SCC in HDLC mode with
bus-specific options selected in the PSMR and GSMR, as outlined below. See also
Section 22.5, "Programming the SCC in HDLC Mode."
22.14.6.1 Programming GSMR and PSMR for the HDLC Bus Protocol
To program the protocol-specific mode register (PSMR), set the bits as described below:
• Configure NOF as preferred
• Set RTE and BUS to 1
• Set BRM to 1 if delayed RTS is desired
• Configure CRC to 16-bit CRC CCITT (0b00).
• Configure other bits to zero or default.
To program the general SCC mode register (GSMR), set the bits as described below:
• Set MODE to HDLC mode (0b0000).
• Configure CTSS to 1 and all other bits to zero or default.
• Configure the DIAG bits for normal operation (0b00).
• Configure RDCR and TDCR for 1× clock (0b00).
• Configure TENC and RENC for NRZ (0b000).
• Clear RTSM to send idles between frames.
• Set GSMR_L[ENT, ENR] as the last step to begin operation.
22.14.6.2 HDLC Bus Controller Programming Example
Except for the above discussion in Section 22.14.6.1, "Programming GSMR and PSMR for
the HDLC Bus Protocol," use the example in Section 22.13.1, "SCC HDLC Programming
Example #1."
MOTOROLA
Freescale Semiconductor, Inc.
Chapter 22. SCC HDLC Mode
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HDLC Bus Mode with Collision Detection
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