Motorola PowerQUICC II MPC8280 Series Reference Manual page 1145

Table 32-3. AAL1 CES Field Descriptions (continued)
Offset Name
0x44 UDC_TMP_BASE
0x46 INT_RCT_BASE
0x48 INT_TCT_BASE
0x4A INT_TCTE_BASE
0x4C —
0x50 EXT_RCT_BASE
0x54 EXT_TCT_BASE
0x58 EXT_TCTE_BASE
0x5C UEAD_OFFSET
0x5E —
0x60 PMT_BASE
0x62 APCP_BASE
0x64 FBT_BASE
0x66 INTT_BASE
0x5E —
0x6A UNI_STATT_BASE
0x6C BD_BASE_EXT
0x70 VPT_BASE /
EXT_CAM_BASE
0x74 VCT_BASE
0x78 VPT1_BASE /
EXT_CAM1_BASE
0x7C VCT1_BASE
0x80 VP_MASK
0x82 VCI_Filtering
MOTOROLA
Freescale Semiconductor, Inc.
Width
Hword UDC mode only. Points to a total of 32 bytes reserved dual-port RAM
area used by the CP. Should be 64-byte aligned. User-defined.
Hword Internal receive connection table base. User-defined.
Hword Internal transmit connection table base. User-defined.
Hword Internal transmit connection table extension base. User-defined. Note
that the TCT extension is not needed in AAL1 CES and that the AAL1
CES microcode uses this Hword to point to a CAS routing table.
Word Reserved, should be cleared during initialization.
Word External receive connection table base. User-defined.
Word External transmit connection table base. User-defined.
Word External transmit connection table extension base. User-defined. Note
that the TCT extension is not needed in AAL1 CES and that the AAL1
CES microcode uses this Hword to point to a CAS routing table.
Hword User-defined cells mode only. The offset of the UEAD entry in the UDC
extra header. Should be an even address. If RCT[BO]=01
UEAD_OFFSET should be in little-endian format. For example if UEAD
entry is the first half word of the extra header in external memory,
UEAD_OFFSET should be set to 2 (second half word entry in internal
RAM).
Hword Reserved, should be cleared during initialization.
Hword Performance monitoring table base. User-defined.
Hword APC parameters table base address. User-defined.
Hword Free buffer pool parameters table base. User-defined.
Hword Interrupt queue parameters table base. User-defined.
— Reserved, should be cleared during initialization.
Hword UNI statistics table base. User-defined.
Word BD table base address extension. BD_BASE_EXT[0–7] holds the 8 left
bits of the Rx/Tx BD table base address. BD_BASE_EXT[8–31] should
be zero. User-defined.
Word Base address of the address compression VP table/external CAM.
User-defined.
Word Base address of the address compression VC table. User-defined.
Word Base address of the address compression VP1 table/EXT CAM1.
User-defined.
Word Base address of the address compression VC1 table. User-defined.
Hword VP mask for address compression lookup. User-defined.
Hword VCI filtering enable bits. When cells with VCI = 3, 4, 6, 7-15 are received
and the associated VCI_Filtering bit = 1 the cell is sent to the raw cell
queue. VCI=3 is associated with VCI_Filtering[3], VCI=15 is associated
with VCI_Filtering[15]. VCI_Filtering[0–2, 5] should be zero. See
Section 31.10.1.2, "VCI Filtering (VCIF)."
Chapter 32. ATM AAL1 Circuit Emulation Service
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AAL-1 Memory Structure
Description
32-25