Motorola PowerQUICC II MPC8280 Series Reference Manual page 737

Data
NRZ
NRZI Mark
NRZI Space
FM0
FM1
Manchester
Differential
Manchester
If the DPLL is not needed, NRZ or NRZI codings can be selected in GSMR_L[RENC,
TENC]. Coding definitions are shown in Table 20-9.
Coding
NRZ A one is represented by a high level for the duration of the bit and a zero is represented by a low level.
NRZI Mark A one is represented by no transition at all. A zero is represented by a transition at the beginning of the
bit (the level present in the preceding bit is reversed).
NRZI Space A one is represented by a transition at the beginning of the bit (the level present in the preceding bit is
reversed). A zero is represented by no transition at all.
FM0 A one is represented by a transition only at the beginning of the bit. A zero is represented by a transition
at the beginning of the bit and another transition at the center of the bit.
FM1 A one is represented by a transition at the beginning of the bit and another transition at the center of the
bit. A zero is represented by a transition only at the beginning of the bit.
Manchester A one is represented by a high-to-low transition at the center of the bit. A zero is represented by a low to
high transition at the center of the bit. In both cases there may be a transition at the beginning of the bit
to set up the level required to make the correct center transition.
Differential A one is represented by a transition at the center of the bit with the opposite direction from the transition
Manchester at the center of the preceding bit. A zero is represented by a transition at the center of the bit with the
same polarity from the transition at the center of the preceding bit.
MOTOROLA Chapter 20. Serial Communications Controllers (SCCs)
Freescale Semiconductor, Inc.
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Figure 20-15. DPLL Encoding Examples
Table 20-9. DPLL Codings
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Description
SCC Parameter RAM
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20-25