Motorola PowerQUICC II MPC8280 Series Reference Manual page 1364

Configuring the SPI Controller
Notes:
• All signals are open-drain
• For a system with more than two masters, SPISEL and SPIE[MME] do not detect all possible conflicts
• It is the responsibility of software to arbitrate for the SPI bus (with token passing, for example)
• SELOUTx signals are implemented in software with general-purpose I/O signals
The maximum sustained data rate that the SPI supports is SYSTEMCLK/50. However, the
SPI can transfer a single character at much higher rates—SYSTEMCLK/4 in master mode
39-6
Freescale Semiconductor, Inc.
MPC8280
SPI #0
SPIMOSI
SPIMISO
SPICLK
SPISEL
SELOUT1
SELOUT2
SELOUT3
MPC8280
SPI #1
SPIMOSI
SPIMISO
SPICLK
SPISEL
SELOUT0
SELOUT2
SELOUT3
MPC8280
SPI #2
SPIMOSI
SPIMISO
SPICLK
SPISEL
SELOUT0
SELOUT1
SELOUT3
MPC8280
SPI #3
SPIMOSI
SPIMISO
SPICLK
SPISEL
SELOUT0
SELOUT1
SELOUT2
Figure 39-3. Multi-Master Configuration
MPC8280 PowerQUICC II Family Reference Manual
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