Motorola PowerQUICC II MPC8280 Series Reference Manual page 585

0
Field —
Reset
R/W
Addr
Figure 14-4. RISC Time-Stamp Control Register (RTSCR)
Table 14-4 describes RTSCR fields.
Bits Name
0–4 — Reserved
5 RTE Time stamp enable.
0 Disable time-stamp timer.
1 Enable time-stamp timer.
6–15 RTPS Time-stamp timer pre-scale. Must be programmed to generate a 1-µs period input clock to the
time-stamp timer. (Time-stamp frequency = (CPM frequency)/(RTPS+2)
14.3.9 RISC Time-Stamp Register (RTSR)
The RISC time-stamp register (RTSR), shown in Figure 14-5, contains the time stamp.
0
Field
Reset
R/W
Addr
16
Field
Reset
R/W
Addr
Figure 14-5. RISC Time-Stamp Register (RTSR)
After reset, setting RTSCR[RTE] causes the time stamp to start counting microseconds
from zero.
14.3.10 RISC Microcode Revision Number
Associated with each version of CPM microcode, is a number (REV_NUM) that uniquely
identifies that specific microcode. This number is hard-coded into the microcode which is
MOTOROLA Chapter 14. Communications Processor Module Overview
Freescale Semiconductor, Inc.
4 5 6
RTE
0000_0000_0000_0000
Table 14-4. RTSCR Field Descriptions
Time Stamp
Time Stamp
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Communications Processor (CP)
RTPS (Timer Prescale)
R/W
0x119DC
Description
—
R
0x119E0
—
R
0X119E2
15
15
31
14-11