Motorola PowerQUICC II MPC8280 Series Reference Manual page 1067

Table 31-19. AAL1 Protocol-Specific RCT Field Descriptions (continued)
Offset Bits Name
0x18 0–3 —
4 SNEM
5–7 —
8 RXBM
9–15 —
31.10.2.2.4 AAL0 Protocol-Specific RCT
Figure 31-29 shows the layout for the AAL0 protocol-specific RCT.
0 1
Offset + 0x0E
Offset + 0x10
Offset + 0x12
Offset + 0x14
Offset + 0x16
Offset + 0x18
Table 31-20 describes AAL0 protocol specific RCT fields.
Table 31-20. AAL0-Specific RCT Field Descriptions
Offset Bits Name
0x0E 0-7 —
8-9 0b01
10 INVE
11-15 —
0x10 — —
MOTOROLA Chapter 31. ATM Controller and AAL0, AAL1, and AAL5
Freescale Semiconductor, Inc.
Reserved, should be cleared.
Sequence number error flag interrupt mask
0 This mode is disabled.
1 When an out-of-sequence error occurs, an RXB interrupt is sent to the interrupt
queue even if RCT[RXBM] is cleared. Note that this mode is the buffer error reporting
mechanism during automatic data forwarding (ATM-to-TDM bridging) when no buffer
processing is required (RCT[RXBM]=0).
Reserved, should be cleared.
Receive buffer interrupt mask
0 The receive buffer event of this channel is disabled. (The event is not sent to the
interrupt queue.)
1 The receive buffer event of this channel is enabled.
Reserved, should be cleared.
2 3 4 5 6
—
—
Figure 31-29. AAL0 Protocol-Specific RCT
Reserved, should be cleared.
Must be programmed to 0b01 for AAL0.
Inverted empty.
0 RxBD[E] is interpreted normally (1 = empty, 0 = not empty).
1 RxBD[E] is handled in negative logic (0 = empty, 1 = not empty).
Reserved, should be cleared.
Reserved, should be cleared.
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Description
7 8 9 10 11
0 1 INVE
—
RXBM
Description
ATM Memory Structure
12 13 14 15
—
—
31-53