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Motorola MC68340 User Manual

Motorola MC68340 User Manual

Integrated processor with dma
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Freescale Semiconductor, Inc.
µ MOTOROLA
MC68340
Integrated Processor with DMA
User's Manual
©MOTOROLA INC., 1992
For More Information On This Product,
Go to: www.freescale.com

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  • Page 1 Freescale Semiconductor, Inc. µ MOTOROLA MC68340 Integrated Processor with DMA User’s Manual ©MOTOROLA INC., 1992 For More Information On This Product, Go to: www.freescale.com...
  • Page 2 Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur.
  • Page 3 MC68340; the MC68000 Family Programmer’s Reference Manual provides instruction details for the MC68340; and the MC68340 Integrated Processor with DMA Product Brief provides a brief description of the MC68340 capabilities. This user’s manual is organized as follows:...
  • Page 4: Table Of Contents

    Function Codes (FC3–FC0)................2-5 Chip Selects ( CS3 – CS0 ) ................2-5 Interrupt Request Level ( IRQ7 , IRQ6 , IRQ5 , IRQ3 ) ........2-6 MOTOROLA MC68340 USER'S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 5 2.14 Timer Signals ....................2-12 Timer Gate ( TGATE2 , TGATE1 )..............2-12 2.14.1 2.14.2 Timer Input (TIN2, TIN1) ................2-12 2.14.3 Timer Output (TOUT2, TOUT1)..............2-12 MC68340 USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 6 Synchronous Operation with DSACK ............. 3-14 3.2.5 3.2.6 Fast Termination Cycles................3-15 Data Transfer Cycles..................3-16 3.3.1 Read Cycle..................... 3-16 3.3.2 Write Cycle..................... 3-18 3.3.3 Read-Modify-Write Cycle................3-19 MOTOROLA MC68340 USER'S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 7 Clock Synthesizer Operation..............4-9 4.2.3.1 Phase Comparator and Filter ..............4-11 4.2.3.2 Frequency Divider ..................4-12 4.2.3.3 Clock Control..................... 4-13 4.2.4 Chip Select Operation ................. 4-13 4.2.4.1 Programmable Features................4-14 MC68340 USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 8 Port B Pin Assignment Register (PPARB) ..........4-35 4.3.5.6 Port B Data Direction Register (DDRB)..........4-35 4.3.5.7 Port B Data Register (PORTB, PORTB1) ..........4-35 MC68340 Initialization Sequence..............4-36 4.4.1 Startup ......................4-36 4.4.2 SIM40 Module Configuration ..............4-36 4.4.3 SIM40 Example Configuration Code............
  • Page 9 Pipeline Synchronization with the NOP Instruction........ 5-36 Processing States..................... 5-36 5.4.1 State Transitions................... 5-37 5.4.2 Privilege Levels..................... 5-37 5.4.2.1 Supervisor Privilege Level..............5-37 5.4.2.2 User Privilege Level................. 5-39 viii MC68340 USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 10 Bus Error Stack Frame................5-60 Development Support..................5-63 5.6.1 CPU32 Integrated Development Support..........5-63 5.6.1.1 Background Debug Mode (BDM) Overview ........5-64 5.6.1.2 Deterministic Opcode Tracking Overview..........5-64 MOTOROLA MC68340 USER'S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 11 Instruction Pipe ( IPIPE )................5-87 5.6.3.2 5.6.3.3 Opcode Tracking during Loop Mode ............ 5-88 Instruction Execution Timing................5-88 5.7.1 Resource Scheduling .................. 5-88 5.7.1.1 Microsequencer ..................5-89 5.7.1.2 Instruction Pipeline................... 5-89 MC68340 USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 12 Internal Request Generation............... 6-4 6.3.1.1 Internal Request, Maximum Rate............6-5 6.3.1.2 Internal Request, Limited Rate ............... 6-5 6.3.2 External Request Generation ..............6-5 6.3.2.1 External Burst Mode................. 6-5 MOTOROLA MC68340 USER'S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 13 7.1.1 Serial Communication Channels A and B..........7-3 7.1.2 Baud Rate Generator Logic ................ 7-3 7.1.3 Internal Channel Control Logic..............7-3 7.1.4 Interrupt Control Logic ................. 7-3 MC68340 USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 14 Read Cycles....................7-17 7.3.5.2 Write Cycles....................7-17 7.3.5.3 Interrupt Acknowledge Cycles..............7-17 Register Description and Programming ............7-17 7.4.1 Register Description..................7-17 7.4.1.1 Module Configuration Register (MCR)..........7-19 MOTOROLA MC68340 USER'S MANUAL xiii For More Information On This Product, Go to: www.freescale.com...
  • Page 15 Timer Gate ( TGATE1 , TGATE2 )..............8-6 8.2.2 8.2.3 Timer Output (TOUT1, TOUT2)..............8-6 Operating Modes ....................8-6 8.3.1 Input Capture/Output Compare..............8-6 8.3.2 Square-Wave Generator................8-8 MC68340 USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 16 9.4.1 EXTEST (000) ....................9-10 9.4.2 SAMPLE/PRELOAD (001) ................9-10 9.4.3 BYPASS (X1X, 101)..................9-11 9.4.4 HI-Z (100) ....................... 9-11 MC68340 Restrictions..................9-11 Non-IEEE 1149.1 Operation................9-12 Section 10 Applications 10.1 Minimum System Configuration..............10-1 10.1.1 Processor Clock Circuitry................10-1...
  • Page 17 10.2.4 Interfacing an 8-Bit Device to 16-Bit Memory Using Single-Address DMA Mode..............10-10 10.3 Power Consumption Considerations............10-10 10.3.1 MC68340 Power Reduction at 5V ............10-11 10.3.2 MC68340V (3.3 V) ..................10-13 Section 11 Electrical Characteristics 11.1 Maximum Rating ..................... 11-1 11.2...
  • Page 18 Block Diagram......................1-1 Functional Signal Groups ..................2-1 Input Sample Window.................... 3-2 MC68340 Interface to Various Port Sizes............3-7 Long-Word Operand Read Timing from 8-Bit Port..........3-11 Long-Word Operand Write Timing to 8-Bit Port..........3-12 Long-Word and Word Read and Write Timing—16-Bit Port ......3-13 Fast Termination Timing..................
  • Page 19 LIST OF ILLUSTRATIONS (Continued) Figure P a g e Number Title Number MC68340 Crystal Oscillator.................. 4-10 Clock Block Diagram for External Oscillator Operation........4-11 Full Interrupt Request Multiplexer................ 4-16 SIM40 Programming Model.................. 4-19 CPU32 Block Diagram................... 5-3 Loop Mode Instruction Sequence ............... 5-3 User Programming Model..................
  • Page 20 Period Measurement Mode .................. 8-14 8-10 Event Count Mode....................8-15 8-11 Timer Module Programming Model..............8-18 Test Access Port Block Diagram................9-2 TAP Controller State Machine................9-3 MOTOROLA MC68340 USER'S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 21 Single-Address DMA Mode................10-10 10-15 MC68340 Current vs. Activity at 5 V..............10-11 10-16 MC68340 Current vs. Voltage/Temperature............ 10-12 10-17 MC68340 Current vs. Clock Frequency at 5 V..........10-12 11-1 Drive Levels and Test Points for AC Specifications........11-4 11-2 Read Cycle Timing Diagram................
  • Page 22 11-18 Serial Module Synchronous Mode Timing Diagram ........11-23 11-19 Test Clock Input Timing Diagram............... 11-25 11-20 Boundary Scan Timing Diagram ............... 11-26 11-21 Test Access Port Timing Diagram..............11-26 MOTOROLA MC68340 USER'S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 23 5-10 Program Control Operations................. 5-26 5-11 System Control Operations................... 5-28 5-12 Condition Tests ....................... 5-29 5-13 Standard Usage Entries..................5-30 5-14 Compressed Table Entries ................... 5-32 xxii MC68340 USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 24 Boundary Scan Control Bits ................. 9-4 Boundary Scan Bit Definitions ................9-5 Instructions....................... 9-10 10-1 Memory Access Times at 16.78 MHz..............10-7 10-2 Typical Electrical Characteristics............... 10-13 MOTOROLA MC68340 USER'S MANUAL xxiii For More Information On This Product, Go to: www.freescale.com...
  • Page 25: Device Overview

    The MC68340 CPU32 delivers 32-bit CISC processor performance from a lower cost 16-bit memory system. The combination of peripherals offered in the MC68340 can be found in a diverse range of microprocessor-based systems, including embedded control and general computing.
  • Page 26: M68300 Family

    • 144-Pin Ceramic Quad Flat Pack (CQFP) or 145-Pin Plastic Pin Grid Array (PGA) As a low voltage part, the MC68340V can operate with a 3.3-V power supply. MC68340 is used throughout this manual to refer to both the low voltage and standard 5-V parts since both are functionally equivalent.
  • Page 27: Organization

    The CPU32 is a powerful central processor that supervises system functions, makes decisions, manipulates data, and directs I/O. A special debugging mode simplifies processor emulation during system debug. MOTOROLA MC68340 USER’S MANUAL 1- 3 For More Information On This Product, Go to: www.freescale.com...
  • Page 28: Cpu32

    Position-independent code is easily written. The CPU32 is specially optimized to run with the MC68340's 16-bit data bus. Most instructions execute in one-half the number of clocks compared to the original MC68000, yielding an overall 1.6 times the performance of the same-speed MC68000 and measuring 10,045 Dhrystones/sec 25.16 MHz (6,742 Dhrystones/sec...
  • Page 29: On-Chip Peripherals

    To improve total system throughput and reduce part count, board size, and cost of system implementation, the M68300 family integrates on-chip, intelligent peripheral modules and typical glue logic. These functions on the MC68340 include the SIM40, a DMA controller, a serial module, and two timers.
  • Page 30: System Configuration And Protection

    1.3.1.2 SYSTEM CONFIGURATION AND PROTECTION. The M68000 family of processors is designed with the concept of providing maximum system safeguards. System configuration and various monitors and timers are provided in the MC68340. Power-on reset circuitry is a part of the SIM40. A bus monitor ensures that the system does not lock up when there is no response to a memory access.
  • Page 31: Ieee 1149.1 Test Access Port

    Freescale Semiconductor, Inc. 1.3.1.7 IEEE 1149.1 TEST ACCESS PORT. To aid in system diagnostics, the MC68340 includes dedicated user-accessible test logic that is fully compliant with the IEEE 1149.1 standard for boundary scan testability, often referred to as JTAG (Joint Test Action Group).
  • Page 32: Timer Modules

    The MC68340 has two, identical, versatile, on-chip counter/timers as well as a simple timer in the SIM40. These general-purpose counter/timers can be used for precisely timed events without the errors to which software-based counters and timers are susceptible—...
  • Page 33: Physical

    SIM40's periodic interrupt timer. 1.5 PHYSICAL The MC68340 is available as 0–16.78 MHz and 0–25.16 MHz, 0 C to +70 C and -40 C to +85 C, and 5.0 V 5% and 3.3 V 0.3 supply voltages (reduced frequencies at 3.3 V) Thirty-two power and ground leads minimize ground bounce and ensure proper isolation of different sections of the chip, including the clock oscillator.
  • Page 34: More Information

    Freescale Semiconductor, Inc. 1.7 MORE INFORMATION The following table lists available documentation related to the MC68340: Document Number Document Name BR1114/D M68300 Integrated Processor Family MC68340 Technical Summary MC68340/D MC68340UM/AD MC68340 User's Manual M68000 Family Programmer's Reference Manual M68000PM/AD AN1063/D...
  • Page 35: Signal Descriptions

    Freescale Semiconductor, Inc. SECTION 2 SIGNAL DESCRIPTIONS This section contains brief descriptions of the MC68340 input and output signals in their functional groups as shown in Figure 2-1. A31/PORT A7/IACK7 A30/PORT A6/IACK6 A29/PORT A5/IACK5 A28/PORT A4/IACK4 PORT A A27/PORT A3/IACK3...
  • Page 36: Signal Index

    Freescale Semiconductor, Inc. 2.1 SIGNAL INDEX The input and output signals for the MC68340 are listed in Table 2-1. The name, mnemonic, and brief functional description are presented. For more detail on each signal, refer to the signal paragraph. Guaranteed timing specifications for the signals listed in Table 2-1 can be found in Section 11 Electrical Characteristics.
  • Page 37 V CCSYN Quiet power supply to VCO; also used to control — synthesizer mode after reset. System Power Supply V CC , GND Power supply and ground to the MC68340 — and Ground MOTOROLA MC68340 USER’S MANUAL 2- 3 For More Information On This Product,...
  • Page 38: Address Bus

    This bidirectional, nonmultiplexed, parallel bus contains the data being transferred to or from the MC68340. A read or write operation may transfer 8 or 16 bits of data (one or two bytes) in one bus cycle. During a read cycle, the data is latched by the MC68340 on the MC68340 USER’S MANUAL...
  • Page 39: Function Codes (Fc3-Fc0)

    For a write cycle, all 16 bits of the data bus are driven, regardless of the port width or operand size. The MC68340 places the data on the data bus approximately one-half clock cycle after AS is asserted in a write cycle.
  • Page 40: Interrupt Request Level (Irq7, Irq6, Irq5, Irq3)

    DSACK1 and/or DSACK0 as part of the bus protocol. During a read cycle, this signals the MC68340 to terminate the bus cycle and to latch the data. During a write cycle, this indicates that the external device has successfully stored the data and that the cycle may terminate.
  • Page 41: Data Strobe ( Ds )

    2.7.3 Data Strobe ( DS ) DS is an output timing signal that applies to the data bus. For a read cycle, the MC68340 asserts DS and AS simultaneously to signal the external device to place data on the bus.
  • Page 42: Read-Modify-Write Cycle ( Rmc )

    This active-low, open-drain, bidirectional signal is used to initiate a system reset. An external reset signal (as well as a reset from the SIM40) resets the MC68340 and all external devices. A reset signal from the CPU32 (asserted as part of the RESET instruction) resets external devices;...
  • Page 43: Crystal Oscillator (Extal, Xtal)

    This development serial input signal helps to provide serial communications for background debug mode. 2.11.2 Instruction Pipe (IPIPE) This pin functions as IPIPE in normal operation and as DSO in background debug mode. MOTOROLA MC68340 USER’S MANUAL 2- 9 For More Information On This Product, Go to: www.freescale.com...
  • Page 44: Breakpoint (Bkpt)

    As an output, it is only active in external request mode. An external pullup resistor is required even during operation in the internal request mode. 2-10 MC68340 USER’S MANUAL MOTOROLA For More Information On This Product,...
  • Page 45: Serial Module Signals

    2.13.7 Transmitter Ready (T RDYA) This active-low output can be programmed as the channel A transmitter ready status indicator or used as a discrete output. MOTOROLA MC68340 USER’S MANUAL 2- 11 For More Information On This Product, Go to: www.freescale.com...
  • Page 46: Receiver Ready ( R Rdya )

    These inputs can be programmed as clocks that cause events to occur in the counters and prescalers. 2.14.3 Timer Output (TOUT2, TOUT1) These outputs drive the various output waveforms generated by the timers. 2-12 MC68340 USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 47: Test Signals

    Integration Module for more information. 2.17 SYSTEM POWER AND GROUND (V CC AND GND) These pins provide system power and ground to the MC68340. Multiple pins are provided for adequate current capability. All power supply pins must have adequate bypass capacitance for high-frequency noise suppression.
  • Page 48 IPIPE /DSO Out/Out Low/— No/— Development Serial Out Breakpoint/ BKPT /DSCLK In/In Low/— —/— Development Serial Clock Freeze FREEZE High Receive Data RxDA, RxDB — — 2-14 MC68340 USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 49 — Test Data Out High — Synchronizer Power V CCSYN – — — System Power Supply and V CC , GND – — — Return MOTOROLA MC68340 USER’S MANUAL 2- 15 For More Information On This Product, Go to: www.freescale.com...
  • Page 50: Bus Operation

    The maximum number of bits accepted or provided during a bus transfer is defined as the port width. The MC68340 contains an address bus that specifies the address for the transfer and a data bus that transfers the data.
  • Page 51: Bus Control Signals

    3.1.1 Bus Control Signals The MC68340 initiates a bus cycle by driving the A31–A0, SIZx, FCx, and R/ W outputs. At the beginning of a bus cycle, SIZ1 and SIZ0 are driven with FC3–FC0. SIZ1 and SIZ0 indicate the number of bytes remaining to be transferred during an operand cycle (consisting of one or more bus cycles).
  • Page 52: Function Code Signals

    Address Spaces Reserved (Motorola) User Data Space User Program Space Reserved (User ) Reserved (Motorola) Supervisor Data Space Supervisor Program Space CPU Space DMA Space MOTOROLA MC68340 USER’S MANUAL 3- 3 For More Information On This Product, Go to: www.freescale.com...
  • Page 53: Address Bus (A31-A0)

    This bidirectional, nonmultiplexed, parallel bus contains the data being transferred to or from the MC68340. A read or write operation may transfer 8 or 16 bits of data (one or two bytes) in one bus cycle. During a read cycle, the data is latched by the MC68340 on the last falling edge of the clock for that bus cycle.
  • Page 54: Bus Error ( Berr )

    8- and 16-bit ports. During an operand transfer cycle, the slave device signals its port size (byte or word) and indicates completion of the bus cycle to the MC68340 through the use of the DSACK inputs. Refer to Table 3-3 for DSACK encoding.
  • Page 55 For example, if the MC68340 is executing an instruction that reads a long-word operand from a 16-bit port, the MC68340 latches the 16 bits of valid data and runs another bus cycle to obtain the other 16 bits. The operation from an 8-bit port is similar, but requires four read cycles.
  • Page 56: Misaligned Operands

    The following cases are examples of the allowable alignments of operands to ports. 3.2.3.1 BYTE OPERAND TO 8-BIT PORT, ODD OR EVEN (A0 = X). The MC68340 drives the address bus with the desired address and the SIZx pins to indicate a single- byte operand.
  • Page 57: Byte Operand To 16-Bit Port, Even (A0 = 0)

    15–8 and ignores bits 7–0. For a write operation, the MC68340 drives the single-byte operand on both bytes