Motorola PowerQUICC II MPC8280 Series Reference Manual page 1160

ATM Controller Buffers
RBD_Base
Pointers
from ch 1
entry of
RCT
RBD_Offset
RBD_Base
Pointers
from ch 4
entry of
RCT
RBD_Offset
Figure 32-27. Receive Buffers and BD Table Example
32.12 ATM Controller Buffers
Table 32-10 describes properties of the ATM receive and transmit buffers.
AAL
AAL5 Multiple of 48 octets (except last buffer in frame) Double word aligned Any
AAL3/4 At least 44 octets (except last buffer in frame)
AAL1/ Multiple of 8 octets
AAL1
CES
AAL0 52-64 octets.
32.12.1 AAL1 CES RxBD
Figure 32-28 shows the AAL1 CES RxBD.
32-40
Freescale Semiconductor, Inc.
BD memory space
Rx BD table
of ch 1
RxBD 1
RxBD 2
RxBD 3
RxBD 4
RxBD 5
RxBD 6
Rx BD table
of ch 4
RxBD 1
RxBD 2
RxBD 3
RxBD 4
RxBD 5
RxBD 6
RxBD 7
RxBD 8
RxBD 9
Table 32-10. Receive and Transmit Buffers
Receive
Size
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Data memory space
Rx buffer 1 of
channel 1
Rx buffer 3 of
channel 1
•
Rx buffer 4 of
•
channel 1
•
Rx buffer 1 of
channel 4
Rx buffer 2 of
•
channel 4
•
•
Rx buffer 3 of
channel 4
Alignment
Double word aligned At least 44 octets
No requirement Multiple of 8 octets No requirement
Burst-aligned 52–64 octets.
Rx buffer 2 of
channel 1
Rx buffer 8 of
channel 4
Transmit
Size Alignment
No requirement
No requirement
No requirement
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