Motorola PowerQUICC II MPC8280 Series Reference Manual page 460

Register Descriptions
11.3.3 60x SDRAM Mode Register (PSDMR)
The 60x SDRAM mode register (PSDMR), shown in Figure 11-10, is used to configure
operations pertaining to SDRAM.
0 1 2
Field PBI RFEN
Reset
R/W
Addr
16 17
Field RFRC PRETOACT
Reset
R/W
Addr
Figure 11-10. 60x/Local SDRAM Mode Register (PSDMR/LSDMR)
Table 11-8 describes PSDMR fields. LSMDR fields are described in Table 11-9..
Bits Name
0 PBI Page-based interleaving. Selects the address multiplexing method. PBI works in conjunction
with PSDMR[SDA10]. See Section 11.4.5, "Bank Interleaving."
0 Bank-based interleaving (default at reset)
1 Page-based interleaving (recommended operation)
1 RFEN Refresh enable. Indicates that the SDRAM needs refresh services.
0 Refresh services are not required
1 Refresh services are required
Note: After system reset, RFEN is cleared.
See Section 11.3.8, "60x Bus-Assigned UPM Refresh Timer (PURT)," Section 11.3.9, "Local
Bus-Assigned UPM Refresh Timer (LURT)," Section 11.3.10, "60x Bus-Assigned SDRAM
Refresh Timer (PSRT)," and Section 11.3.11, "Local Bus-Assigned SDRAM Refresh Timer
(LSRT)."
2–4 OP SDRAM operation. Determines which operation occurs when the SDRAM device is accessed.
000 Normal operation
001 CBR refresh, used in SDRAM initialization.
010 Self refresh (for debug purpose).
011 Mode Register write, used in SDRAM initialization.
Note that if 60x-compatible mode is in effect on the 60x bus or the SDRAM port size is 8/16 or
the SDRAM is connected to the BADDR lines (not needed for 64/32 port size), the bus master
must supply the mode register data on the low bits of the address during the access.
100 Precharge bank (for debug purpose).
101 Precharge all banks, used in SDRAM initialization.
110 Activate bank (for debug purpose).
111 Read/write (for debug purpose).
5–7 SDAM Address multiplex size. Determines how the address of the current memory cycle can be output
on the address pins. See Section 11.4.5.2, "SDRAM Address Multiplexing (SDAM and BSMA)."
11-22
Freescale Semiconductor, Inc.
4 5 7
OP SDAM
0000_0000_0000_0000
0x10190 (PSDMR), 0x10194 (LSDMR)
19 20 22 23
ACTTORW BL LDOTOPRE
0000_0000_0000_0000
0x10192 (PSDMR), 0x10196 (LSDMR)
Table 11-8. PSDMR Field Descriptions
MPC8280 PowerQUICC II Family Reference Manual
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8 11
BSMA
R/W
24 25 26 27 28
WRC EAMUX BUFCMD
R/W
Description
13 14 15
SDA10 RFRC
29 30 31
CL
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