Scm Control Register (Scmcntrl) - Texas Instruments TMS570LC4357 Technical Reference Manual

Tms570lc43 series 16/32-bit risc flash microcontrollers
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3.4.2 SCM Control Register (SCMCNTRL)

31
28
Reserved
R-0
15
12
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -n = value after synchronous reset on system reset
Bit
Field
31-28 Reserved
27-24 PAR DIAG EN
23-20 Reserved
19-16 GLOBAL_ERROR_CLR
15-12 Reserved
11-8
DTC_SOFT_RESET
7-4
Reserved
3-0
TO_CLEAR
SPNU563A – March 2018
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Figure 3-6. SCM Control Register (SCMCNTRL) [offset = 04h]
27
PAR DIAG EN
R/WP-5h
11
DTC_SOFT_RESET
R/WP-5h
Table 3-3. SCM Control Register (SCMCNTRL) Field Descriptions
Value
Description
0
Reserved. Reads return 0.
Sticky key write values of Ah. Writing Ah sends out an active-high "pulse" to the SCR
and resets the key back to 5h.
Read:
5h
Sticky key.
All other values Reserved
Write in Privilege:
Ah
Parity diagnostic enable.
All other values Reserved
0
Reserved. Reads return 0.
Clear global error in interconnect. Writing Ah sends out a clear pulse to the SCR and
resets the key back to 5h.
Read:
5h
Sticky key.
All other values Reserved
Write in Privilege:
Ah
Enable global error clear.
All other values Reserved
0
Reserved. Reads return 0.
Diagnostic self-test error enable. Writing Ah forces the SCM to initiate self-test
sequence. The hardware will reset the key back to 0x5 whenever self-test is
completed.
Read:
5h
Sticky key.
All other values Reserved
Write in Privilege:
Ah
Enable sequence to start interconnect self-test.
All other values Reserved
0
Reserved. Reads return 0.
Clear real time counters inside SCR. Writing Ah sends out a clear pulse to the SCR
and resets the key back to 5h.
Read:
5h
Sticky key.
All other values Reserved
Write in Privilege:
Ah
Enable global error clear.
All other values Reserved
Copyright © 2018, Texas Instruments Incorporated
24
23
Reserved
R-0
8
7
Reserved
R-0
SCM Registers
20
19
GLOBAL_ERROR_CLR
R/WP-5h
4
3
TO_CLEAR
R/WP-5h
SCR Control Module (SCM)
16
0
261

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