Advisory - Epie: Spurious Vcu Interrupt (Epie 12.6) Can Occur When First Enabled; Advisory - Eqep: Position Counter Incorrectly Reset On Direction Change During Index - Texas Instruments Silicon Errata TMS320F28379S Instruction Manual

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Advisory
ePIE: Spurious VCU Interrupt (ePIE 12.6) Can Occur When First Enabled
B
Revision(s) Affected
The VCU-II can power up in a state which incorrectly sets the VCU VSTATUS[DIVE]
Details
error bit and, subsequently PIEIFR12[INTx6], when the CPU is released from reset.
When the VCU interrupt enable PIEIER12[INTx6] is enabled for the first time by the
application, a spurious interrupt can occur due to the erroneous pending interrupt.
Before enabling VCU interrupt 12.6, execute the following instructions to avoid the
Workaround(s)
spurious interrupt.
// Clear VCU divide by zero status
asm(" VCLRDIVE");
// Clear PIE interrupt for VCU
PieCtrlRegs.PIEIFR12.bit.INTx6 = 0;
Beginning with revision C silicon, the Boot ROM will perform the above workaround
before branching to the application.
Advisory
eQEP: Position Counter Incorrectly Reset on Direction Change During Index
B, C
Revision(s) Affected
While using the PCRM = 0 configuration, if the direction change occurs when the index
Details
input is active, the position counter (QPOSCNT) could be reset erroneously, resulting in
an unexpected change in the counter value. This could result in a change of up to
±4 counts from the expected value of the position counter and lead to unexpected
subsequent setting of the error flags.
While using the PCRM = 0 configuration [that is, Position Counter Reset on Index Event
(QEPCTL[PCRM] = 00)], if the index event occurs during the forward movement, then
the position counter is reset to 0 on the next eQEP clock. If the index event occurs
during the reverse movement, then the position counter is reset to the value in the
QPOSMAX register on the next eQEP clock. The eQEP peripheral records the
occurrence of the first index marker (QEPSTS[FIMF]) and direction on the first index
event marker (QEPSTS[FIDF]) in QEPSTS registers. It also remembers the quadrature
edge on the first index marker so that same relative quadrature transition is used for
index event reset operation.
If the direction change occurs while the index pulse is active, the module would still
continue to look for the relative quadrature transition for performing the position counter
reset. This results in an unexpected change in the position counter value.
The next index event without a simultaneous direction change will reset the counter
properly and work as expected.
Do not use the PCRM = 0 configuration if the direction change could occur while the
Workaround(s)
index is active and the resultant change of the position counter value could affect the
application.
Other options for performing position counter reset, if appropriate for the application
[such as Index Event Initialization (IEI)], do not have this issue.
SPRZ422D – August 2014 – Revised July 2016
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TMS320F2837xS Delfino™ Microcontrollers
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