Servicing Example In Which Another Interrupt Request Is Issued During Interrupt Servicing - Renesas NU85E Preliminary User's Manual

32-bit microprocessor core
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Figure 8-6. Servicing Example in Which Another Interrupt Request Is Issued During Interrupt Servicing (1/2)
Main routine
EI
Interrupt request<a>
Interrupt request<b>
(level 3)
Interrupt request<d>
Interrupt request<c>
(level 3)
Interrupt request<f>
Interrupt request<e>
(level 2)
Interrupt request<h>
Interrupt request<g>
(level 1)
Remarks 1. <a> to <u> in the figure represent dummy names that are assigned to distinguish between the
interrupt requests.
2. Higher or lower default priorities mentioned in the figure indicate relative priorities between two
interrupt requests.
Caution To use multiple interrupt servicing, the contents of the EIPC and EIPSW registers must be
saved.
218
CHAPTER 8 INTC
Servicing of <a>
EI
(level 2)
Servicing of <c>
(level 2)
Servicing of <d>
Servicing of <e>
EI
(level 3)
Servicing of <f>
Servicing of <g>
EI
(level 1)
Servicing of <h>
Preliminary User's Manual A14874EJ3V0UM
Servicing of <b>
Interrupt request <b> is acknowledged because
the priority of <b> is higher than that of <a>
and interrupts are enabled.
Although the priority of interrupt request <d>
is higher than that of <c>, <d> is held
pending because interrupts are disabled.
Interrupt request <f> is held pending even if
interrupts are enabled because its priority
is lower than that of <e>.
Interrupt request <h> is held pending even if
interrupts are enabled because its priority
is the same as that of <g>.

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