Figure 12.7 Sample Serial Transmission Flowchart - Renesas H8SX/1520 Series Hardware Manual

Downloaded from Elcodis.com electronic components distributor
Initialization
Start transmission
Read TDRE flag in SSR
TDRE = 1
Yes
Write transmit data to TDR
and clear TDRE flag in SSR to 0
All data transmitted?
Yes
Read TEND flag in SSR
TEND = 1
Yes
Break output
Yes
Clear DR to 0 and
set DDR to 1
Clear TE bit in SCR to 0
<End>

Figure 12.7 Sample Serial Transmission Flowchart

Section 12 Serial Communication Interface (SCI)
[1] SCI initialization:
[1]
The TxD pin is automatically
designated as the transmit data
output pin. After the TE bit is set to
1, a 1 is output for a frame, and
transmission is enabled.
[2]
[2] SCI state check and transmit data
write:
No
Read SSR and check that the
TDRE flag is set to 1, then write
transmit data to TDR and clear the
TDRE flag to 0.
[3] Serial transmission continuation
procedure:
To continue serial transmission,
read 1 from the TDRE flag to
No
confirm that writing is possible,
then write data to TDR, and clear
the TDRE flag to 0. However, the
TDRE flag is checked and cleared
[3]
automatically when the DMAC is
initiated by a transmit data empty
interrupt (TXI) request and writes
data to TDR.
No
[4] Break output at the end of serial
transmission:
To output a break in serial
transmission, set DDR for the port
No
corresponding to the TxD pin to 1,
[4]
clear DR to 0, then clear the TE bit
in SCR to 0.
Rev. 3.00 Mar. 14, 2006 Page 411 of 804
REJ09B0104-0300