Samsung S3C6400X User Manual page 1120

S3C6400X RISC MICROPROCESSOR
IRDA MODE DEFINITION REGISTER(IRDA_MDR)
Register Address
IrDA_MDR 0x7F00_7004
IrDA _MDR
Reserved
SIP Select
Temic select
Reserved
Mode select
IRDA INTERRUPT / DMA CONFIGURATION REGISTER (IRDA_CNF)
Register Address
IrDA_CNF 0x7F00_7008
IrDA _CNF
Reserved
DMA Enable
DMA Mode
Reserved
Interrupt Enable
R/W
R/W
Bit
[7:5]
[4] SIP select method. If this bit is set to '1' and the
IrDA_CNT[3] is set to '1', the SIP pulse is appended at the
end of FIR/MIR TX frame. Likewise, when this bit is set to
a '0', SIP is generated at the end of the every FIR/MIR
frames. If IrDA_CNT[3] is set to '0', setting this bit to '1'
doesn't help to generate SIP. Along with IrDA_CNT[3] bit,
the way of SIP generation can be controlled.
[3] Bit 3 is Temic transceiver select bit. When bit 3 is clear to
"0", core automatically selects in Temic transceiver mode.
[2:1]
[0]
0 : FIR Mode
R/W
R/W IrDA Interrupt / DMA Configuration Register
Bit
[7:4]
[3]
[2] 0 : Tx DMA
[1]
[0] The bit 0 enables Interrupt output signal.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
IrDA Mode Definition Register
Description
Reserved
Reserved
select the mode of operation as
Description
Description
Reserved
1 : DMA Enable
Reserved
Reset Value
Initial State
1 : MIR Mode
Reset Value
Initial State
1 : Rx DMA
IRDA
0x00
0
0
0
00
0
0x00
0
0
0
0
0
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