S3C2416 Operation Mode Description - Samsung S3C2416 User Manual

S3C2416X RISC MICROPROCESSOR
4.2 S3C2416X OPERATION MODE DESCRIPTION
OM[4] OM[3] OM[2]
0 1
1 0
* OM[0] selects the clock source of MPLL/EPLL
( You can select different EPLL clock source with that of MPLL by software setting – refer to SYSCON)
Table 1-5. S3C2416X Operation Mode Description
OM[1] OM[0]
0
0 0
1
0
0
1
0
0
1
1
0
0
1
1
0
1
1
OM[4] OM[3] OM[2]
iROM
Reserved
JTAG
OneNAND
(Muxed)
OneNAND/
ROM/
ROM
OneNAND
(Demuxed)
PRODUCT OVERVIEW
Operation
OM[1] OM[0]
X-TAL
EXTCLK
Reserved
X-TAL
OneNAND
16-bit
(Muxed)
EXTCLK
X-TAL
8-bit
EXTCLK
OneNAND
X-TAL
(Demuxed)
16-bit
EXTCLK
Mode
iROM
JTAG
ROM/
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