S5PV210_HARDWARE DESING GUIDE REV 1.0
13. SPI
13.1. Signal Description
Signal
SPI0/1_CLK
SPI0/1_nSS
SPI0/1_MISO
SPI0/1_MOSI
13.2. EXTERNAL Loading Capacitance
S5PV210 has three SPI controllers. Both controllers should follow the external loading capacitance below.
Output capacitance must be lower than 30pF at the channel 0/1.
13.3. SPI Maximum Speed
The maximum frequency Master Tx/Master Rx/Slave Rx/Slave Tx(CPHA=0) is up to 50MHz.
The maximum frequency Slave Tx is up to 20MHz(CPHA=1).
I/O
Description
IO
SPI clock
IO
SPI chip select
IO
SPI master input / slave output line
IO
SPI master output / slave input line
101