Base Timer Reset Register - Renesas M16C/29 Series Hardware Manual

M16C/29 Group

13.1.1 Base Timer Reset Register

The Base Timer Reset Register(G1BTRR) provides the capability to reset the Base Timer(BT) when
the base timer count value matches the value stored in the G1BTRR. The G1BTRR is enabled by the
RST4 reset cause select bit,G1BCR0(2). This function is identical in operation to the G1PO0 base
timer reset that is enabled by RST1.The Base Timer Reset feature is included to allow all eight chan-
nels to be used for waveform generation while providing a base timer reset on match function.
It is possible to simultaneously enable both RST1 and RST4, G1PO0 and G1BTRR base timer resets,
although operation of both base timer reset on match functions may cause unexpected behavior. It is
recommended that only one of RST1 or RST4 be enabled.
RST4
Base Timer
Base Timer Reset Register
Base Timer Interrupt
Figure 13.1.1.1. Base Timer Reset operation by Base Timer Reset Register
RST1
Base Timer
G1PO0
G1IR0
Figure 13.1.1.2. Base Timer Reset operation by G1PO0 register
RST2
Base Timer
P8 /INT1
3
________
Note1:INT1 Base Timer reset does not generate a Base Timer interrupt,INT1 may generate an interrupt if enabled.
Figure 13.1.1.3. Base Timer Reset operation by INT1
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
m-2
page 148 of 402
13. Timer S (Input Capture / Output Compare)
m-2 m-1 m
m
m-2 m-1 m
m
m-1 m m+1
_______
m+1 0000 0001
16 16
0000 0001
m+1
16 16
0000 0001
16 16
________