Section 13 I C Bus Interface (Iic); Features - Renesas H8S/2111B Hardware Manual

Bit single-chip microcomputer h8s family / h8s/2100 series
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This LSI has a two-channel I
subset of the Philips I
2
controls the I
C bus differs partly from the Philips configuration, however.
13.1

Features

• Selection of addressing format or non-addressing format
 I
2
C bus format: addressing format with an acknowledge bit, for master/slave operation
 Clocked synchronous serial format: non-addressing format without an acknowledge bit, for
master operation only
• Conforms to Philips I
• Two ways of setting slave address (I
• Start and stop conditions generated automatically in master mode (I
• Selection of the acknowledge output level in reception (I
• Automatic loading of an acknowledge bit in transmission (I
• Wait function in master mode (I
 A wait can be inserted by driving the SCL pin low after data transfer, excluding
acknowledgement.
 The wait can be cleared by clearing the interrupt flag.
• Wait function (I
2
C bus format)
 A wait request can be generated by driving the SCL pin low after data transfer.
 The wait request is cleared when the next transfer becomes possible.
• Interrupt sources
 Data transfer end (including when a transition to transmit mode with I
when ICDR data is transferred, or during a wait state)
 Address match: When any slave address matches or the general call address is received in
slave receive mode with I
arbitration)
 Start condition detection (in master mode)
 Stop condition detection (in slave mode)
• Selection of 16 internal clocks (in master mode)
• Direct bus drive (SCL/SDA pin)
 Eight pins—P52/SCL0, P97/SDA0, P86/SCL1, P42/SDA1, PG4/ExSDAA, PG5/ExSCLA,
PG6/ExSDAB, and PG7/ExSCLB—(normally NMOS push-pull outputs) function as
NMOS open-drain outputs when the bus drive function is selected.
IFIIC60B_010020040200
Section 13 I
2
C bus interface. The I
2
C bus (inter-IC bus) interface functions. The register configuration that
2
C bus interface (I
2
C bus format)
2
C bus format)
2
C bus format (including address reception after loss of master
2
C Bus Interface (IIC)
2
C bus interface conforms to and provides a
2
C bus format)
2
C bus format)
2
2
C bus format)
C bus format)
2
C bus format occurs,
Rev. 1.00, 05/04, page 277 of 544

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