Motorola MPC860 PowerQUICC User Manual page 117

For a current list of useful Motorola documentation, refer to the world-wide web at http://
www.motorola.com/SPS/RISC/netcomm and at http://www.mot.com/SPS/PowerPC/.
Conventions
This chapter uses the following notational conventions:
Bold
mnemonics
italics
0x0
0b0
rA, rB
rD
REG[FIELD]
x
n
Â
&
|
Acronyms and Abbreviations
Table i contains acronyms and abbreviations that are used in this document. Note that the
meanings for some acronyms (such as SDR1 and DSISR) are historical, and the words for
which an acronym stands may not be intuitively obvious.
Term
ALU Arithmetic logic unit
BIST Built-in self test
BPU Branch processing unit
BUID Bus unit ID
MOTOROLA
Bold entries in Þgures and tables showing registers and parameter
RAM should be initialized by the user.
Instruction mnemonics are shown in lowercase bold.
Italics indicate variable command parameters, for example, bcctrx.
Book titles in text are set in italics.
PreÞx to denote hexadecimal number
PreÞx to denote binary number
Instruction syntax used to identify a source GPR
Instruction syntax used to identify a destination GPR
Abbreviations or acronyms for registers or buffer descriptors are
shown in uppercase text. SpeciÞc bits, Þelds, or numerical ranges
appear in brackets. For example, MSR[LE] refers to the little-endian
mode enable bit in the machine state register.
In certain contexts, such as in a signal encoding or a bit Þeld,
indicates a donÕt care.
Indicates an undeÞned numerical value
NOT logical operator
AND logical operator
OR logical operator
Table v. Acronyms and Abbreviated Terms
Part II. PowerPC Microprocessor Module
Part II. PowerPC Microprocessor Module
Meaning
II-iii