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Part I. Overview
Name
Type
PA[4]
Bidirectional General-Purpose I/O Port A Bit 4ÑBit 4 of the general-purpose I/O port A.
CLK4
TOUT2
PA[3]
Bidirectional General-Purpose I/O Port A Bit 3ÑBit 3 of the general-purpose I/O port A.
CLK5
TIN3
BRGO3
PA[2]
Bidirectional General-Purpose I/O Port A Bit 2ÑBit 2 of the general-purpose I/O port A.
CLK6
TOUT3
L1RCLKB
BRGCLK2
PA[1]
Bidirectional General-Purpose I/O Port A Bit 1ÑBit 1 of the general-purpose I/O port A.
CLK7
TIN4
BRGO4
PA[0]
Bidirectional General-Purpose I/O Port A Bit 0ÑBit 0 of the general-purpose I/O port A.
CLK8
TOUT4
L1TCLKB
PB[31]
Bidirectional
SPISEL
(Optional:
REJECT1
Open-drain)
PB[30]
Bidirectional
SPICLK
(Optional:
RSTRT2
Open-drain)
PB[29]
Bidirectional
SPIMOSI
(Optional:
Open-drain)
PB[28]
Bidirectional
SPIMISO
(Optional:
BRGO4
Open-drain)
PB[27]
Bidirectional
I2CSDA
(Optional:
BRGO1
Open-drain)
PB[26]
Bidirectional
I2CSCL
(Optional:
BRGO2
Open-drain)
PB[25]
Bidirectional
SMTXD1
(Optional:
Open-drain)
3-12
Table 3-1. Signal Descriptions (Continued)
CLK4ÑOne of eight clock inputs that can be used to clock SCCs and SMCs.
TOUT2ÑTimer 2 output.
CLK5ÑOne of eight clock inputs that can be used to clock SCCs and SMCs.
TIN3ÑTimer 3 external clock input.
BRGO3ÑOutput clock of BRG3.
CLK6ÑOne of eight clock inputs that can be used to clock the SCCs and SMCs.
TOUT3ÑTimer 3 output.
L1RCLKBÑReceive clock for the serial interface TDM port B.
BRGCLK2ÑOne of the two external clock inputs of the BRGs.
CLK7ÑOne of eight clock inputs that can be used to clock SCCs and SMCs.
TIN4ÑTimer 4 external clock input.
BRGO4ÑBRG4 output clock.
CLK8ÑOne of eight clock inputs that can be used to clock SCCs and SMCs.
TOUT4ÑTimer 4 output.
L1TCLKBÑTransmit clock for the serial interface TDM port B.
General-Purpose I/O Port B Bit 31ÑBit 31 of the general-purpose I/O port B.
SPISELÑSPI slave select input.
REJECT1ÑSCC1 CAM interface reject pin.
General-Purpose I/O Port B Bit 30ÑBit 30 of the general-purpose I/O port B.
SPICLKÑSPI output clock when it is conÞgured as a master or SPI input clock when
it is conÞgured as a slave.
RSTRT2ÑSCC2 serial CAM interface output signal that marks the start of a frame.
General-Purpose I/O Port B Bit 29ÑBit 29 of the general-purpose I/O port B.
SPIMOSIÑSPI output data when it is conÞgured as a master or SPI input data when
it is conÞgured as a slave.
General-Purpose I/O Port B Bit 28ÑBit 29 of the general-purpose I/O port B.
SPIMISOÑSPI input data when the MPC860 is a master; SPI output data when it is
a slave.
BRGO4ÑBRG4 output clock.
General-Purpose I/O Port B Bit 27ÑBit 27 of the general-purpose I/O port B.
2
I2CSDAÑI
C serial data pin. Bidirectional; should be conÞgured as an open-drain
output.
BRGO1ÑBRG1 output clock.
General-Purpose I/O Port B Bit 26ÑBit 26 of the general-purpose I/O port B.
2
I2CSCLÑI
C serial clock pin. Bidirectional; should be conÞgured as an open-drain
output.
BRGO2ÑBRG2 output clock.
General-Purpose I/O Port B Bit 25ÑBit 25 of the general-purpose I/O port B.
SMTXD1ÑSMC1 transmit data output.
MPC860 PowerQUICC UserÕs Manual
Description
MOTOROLA
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