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Figure
Number
28-5
MPC860 Ethernet Parallel CAM Interface ...................................................... 28-11
28-6
Ethernet Address Recognition Flowchart ........................................................ 28-16
28-7
Ethernet Mode Register (PSMR) ..................................................................... 28-20
28-8
SCC Ethernet Receive RxBD .......................................................................... 28-21
28-9
Ethernet Receiving using RxBDs .................................................................... 28-23
28-10
SCC Ethernet TxBD ........................................................................................ 28-24
28-11
SCC Ethernet Event Register (SCCE)/Mask Register (SCCM) ...................... 28-25
28-12
Ethernet Interrupt Events Example.................................................................. 28-26
29-1
Sending Transparent Frames between MPC860................................................ 29-5
29-2
SCC Transparent Receive Buffer Descriptor (RxBD)....................................... 29-9
29-3
SCC Transparent Transmit Buffer Descriptor (TxBD) ................................... 29-11
29-4
SCC Transparent Event Register (SCCE)/Mask Register (SCCM) ................ 29-12
29-5
SCC Status Register in Transparent Mode (SCCS)......................................... 29-13
30-1
SMC Block Diagram.......................................................................................... 30-2
30-2
SMC Mode Registers (SMCMRn)..................................................................... 30-3
30-3
SMC Memory Structure..................................................................................... 30-5
30-4
SMC Function Code Registers (RFCR/TFCR).................................................. 30-7
30-5
SMC UART Frame Format ............................................................................. 30-10
30-6
SMC UART Receive BD (RxBD)................................................................... 30-14
30-7
SMC UART Receiving using RxBDs.............................................................. 30-16
30-8
SMC UART Transmit BD (TxBD).................................................................. 30-17
30-9
SMC UART Event Register (SMCE)/Mask Register (SMCM) ...................... 30-18
30-10
SMC UART Interrupts Example ..................................................................... 30-19
30-11
Synchronization with SMSYNx....................................................................... 30-23
30-12
Synchronization with the TSA......................................................................... 30-24
30-13
SMC Transparent Receive BD (RxBD)........................................................... 30-26
30-14
SMC Transparent Transmit BD (TxBD) ......................................................... 30-28
30-15
SMC Transparent Event Register (SMCE)/Mask Register (SMCM).............. 30-29
30-16
SMC GCI Monitor Channel RxBD.................................................................. 30-33
30-17
SMC GCI Monitor Channel TxBD.................................................................. 30-34
30-18
SMC C/I Channel RxBD ................................................................................. 30-35
30-19
SMC C/I Channel TxBD.................................................................................. 30-35
30-20
SMC GCI Event Register (SMCE)/Mask Register (SMCM) .......................... 30-36
31-1
SPI Block Diagram ............................................................................................ 31-1
31-2
Single-Master/Multi-Slave Configuration ......................................................... 31-4
31-3
Multimaster Configuration................................................................................. 31-6
31-4
SPI Mode Register (SPMODE) ......................................................................... 31-7
31-5
SPI Transfer Format with SPMODE[CP] = 0 ................................................... 31-8
31-6
SPI Transfer Format with SPMODE[CP] = 1 ................................................... 31-8
31-7
SPI Event/Mask Registers (SPIE/SPIM) ......................................................... 31-10
31-8
SPI Command Register (SPCOM)................................................................... 31-10
31-9
Receive/Transmit Function Code Registers (RFCR/TFCR)............................ 31-12
31-10
SPI Memory Structure ..................................................................................... 31-13
xlvi
ILLUSTRATIONS
Title
MPC860 PowerQUICC UserÕs Manual
Page
Number
MOTOROLA
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