Motorola MPC860 PowerQUICC User Manual page 65

¥ Part III, ÒConÞguration,Ó describes start-up behavior of the MPC860.
Ñ Chapter 11, ÒSystem Interface Unit,Ó describes the SIU, which controls system
start-up, initialization and operation, protection, as well as the external system
bus.
Ñ Chapter 12, ÒReset,Ó describes the behavior of the MPC860 at reset and start-up.
¥ Part IV, ÒHardware Interface,Ó descibes external signals, clocking, memory control,
and power management of the MPC860.
Ñ Chapter 13, ÒExternal Signals,Ó provides a detailed description of the external
signals that comprise the MPC860 external interface.
Ñ Chapter 14, ÒMPC860 External Bus Interface,Ó describes the interaction
between signals described in the previous chapter, including numerous examples
and timing diagrams.
Ñ Chapter 15, ÒClocks and Power Control,Ó describes on-chip and external
devices, including the phase-locked loop circuitry and frequency dividers that
generate programmable clock timing for baud-rate generators, timers, and a
variety of low-power mode options.
Ñ Chapter 16, ÒMemory Controller,Ó describes the memory controller, which
controlling a maximum of eight memory banks shared between a general-
purpose chip-select machine (GPCM) and a pair of user-programmable
machines (UPMs).
Ñ Chapter 17, ÒPCMCIA Interface,Ó describes the PCMCIA host adapter module,
which provides all control logic for a PCMCIA socket interface and requires
only additional external analog power switching logic and buffering.
¥ Part V, ÒThe Communications Processor Module,Ó describes the conÞguration,
clocking, and operation of the various communications protocols supported by the
MPC860.
Ñ Chapter 18, ÒCommunications Processor Module and CPM Timers,Ó provides a
brief overview of the MPC860 CPM and a detailed discussion of the clocking
mechanisms supported.
Ñ Chapter 19, ÒCommunications Processor,Ó describes the RISC communications
processor (CP), which handles the low-level communications tasks, freeing the
core for higher-level tasks.
Ñ Chapter 20, ÒSDMA Channels and IDMA Emulation,Ó describes the two
physical serial DMA (SDMA) channels on the MPC860 with which the CP
implements sixteen virtual SDMA channels.
Ñ Chapter 21, ÒSerial Interface,Ó describes the serial interface (SI) in which the
physical interface to all SCCs and SMCs is implemented.
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