Memory Map - Motorola MPC860 PowerQUICC User Manual

Chapter 2

Memory Map

20
20
Each memory resource in the MPC860 is mapped within a contiguous block of 16 Kbyte
memory. The location of this block within the global 4-Gbyte physical memory space can
be mapped on 64-Kbyte resolution through an implementation-speciÞc special-purpose
register (SPR) called the internal memory map register (IMMR). See Section 11.4.1,
ÒInternal Memory Map Register (IMMR).Ó Table 2-1 deÞnes the internal memory map.
Offset
000 SIUMCRÑSIU module conÞguration register
004 SYPCRÑSystem protection control register
008Ð00D Reserved
00E SWSRÑSoftware service register
010 SIPENDÑSIU interrupt pending register
014 SIMASKÑSIU interrupt mask register
018 SIELÑSIU interrupt edge/level register
01C SIVECÑSIU interrupt vector register
020 TESRÑTransfer error status register
024Ð02F Reserved
030 SDCRÑSDMA conÞguration register
034Ð07F Reserved
080 PBR0ÑPCMCIA interface base register 0
084 POR0ÑPCMCIA interface option register 0
088 PBR1ÑPCMCIA interface base register 1
08C POR1ÑPCMCIA interface option register 1
090 PBR2ÑPCMCIA interface base register 2
094 POR2ÑPCMCIA interface option register 2
098 PBR3ÑPCMCIA interface base register 3
09C POR3ÑPCMCIA interface option register 3
0A0 PBR4ÑPCMCIA interface base register 4
MOTOROLA
Table 2-1. MPC860 Internal Memory Map
Name
General System Interface Unit
PCMCIA
Chapter 2. Memory Map
Size Section/Page
32 bits 11.4.2/11-5
32 bits 11.4.3/11-9
6 bytes Ñ
16 bits 11.7.1/11-22
32 bits 11.5.4.1/11-16
32 bits 11.5.4.2/11-17
32 bits 11.5.4.3/11-18
32 bits 11.5.4.4/11-19
32 bits 11.4.4/11-10
12 bytes Ñ
32 bits 20.2.1/20-3
76 bytes Ñ
32 bits 17.4.5/17-12
32 bits 17.4.6/17-13
32 bits 17.4.5/17-12
32 bits 17.4.6/17-13
32 bits 17.4.5/17-12
32 bits 17.4.6/17-13
32 bits 17.4.5/17-12
32 bits 17.4.6/17-13
32 bits 17.4.5/17-12
2-1