ST STM32L4+ Series Reference Manual page 1489

RM0432
41.4.16 Debug mode
When the microcontroller enters debug mode (core halted), the LPTIM counter either
continues to work normally or stops, depending on the DBG_LPTIM_STOP configuration bit
in the DBG module.
41.5 LPTIM low-power modes
Mode
Sleep
Stop
Standby
Low-power timer (LPTIM) applied to STM32L4Rxxx and STM32L4Sxxx only
Figure 443. Encoder mode counting sequence
T1
T2
Counter
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Table 297. Effect of low-power modes on the LPTIM
No effect. LPTIM interrupts cause the device to exit Sleep mode.
If the LPTIM is clocked by an oscillator available in Stop mode, LPTIM is
functional and the interrupts cause the device to exit the Stop mode (refer to
Section 41.3: LPTIM
The LPTIM peripheral is powered down and must be reinitialized after exiting Standby
mode.
down
Description
implementation).
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