Figure 14.1 Block Diagram Of Sci - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Table of Contents

Section 14 Serial Communication Interface (SCI)

• Receive error detection: Parity, overrun, and framing errors

• Break detection: Break can be detected by reading the RxD pin level directly in the case of a

framing error

Clocked Synchronous mode

• Data length: 8 bits

• Receive error detection: Overrun errors detected

Smart Card Interface

• Automatic transmission of error signal (parity error) in receive mode

• Error signal detection and automatic data retransmission in transmit mode

• Direct convention and inverse convention both supported

Rev. 6.00 Mar 15, 2006 page 314 of 570

REJ09B0211-0600

Module data bus

Parity generation

Parity check

Receive shift register

Receive data register

Transmit shift register

Transmit data register

Serial mode register

Serial control register

Serial status register

Smart card mode register

Bit rate register

Figure 14.1 Block Diagram of SCI

Transmission/

reception control

External clock