Input/Output Pins; Figure 12.1 Block Diagram Of Sci; Table 12.1 Pin Configuration - Renesas H8S/2111B Hardware Manual

ExRxD*/RxD
ExTxD*/TxD
ExSCK*/SCK
[Legend]
RSR:
RDR:
TSR:
TDR:
SMR:
Note: * The program development tool (emulator) does not support this function.
12.2

Input/Output Pins

Table 12.1 shows the input/output pins for each SCI channel.

Table 12.1 Pin Configuration

Channel Symbol*
1 SCK1/
ExSCK1*
RxD1/
ExRxD1*
TxD1/
ExTxD1*
Notes: 1. Pin names SCK, RxD, and TxD are used in the text for all channels, omitting the
channel designation.
2. The program development tool (emulator) does not support this function.
Rev. 1.00, 05/04, page 236 of 544
Module data bus
RDR TDR
RSR TSR
Parity generation
Parity check
Receive shift register
Receive data register
Transmit shift register
Transmit data register
Serial mode register

Figure 12.1 Block Diagram of SCI

1
Input/Output
Input/Output
2
Input
2
Output
2
SCMR
SSR
SCR
SMR
Transmission/
reception control
Clock
External clock
SCR: Serial control register
SSR: Serial status register
SCMR: Smart card mode register
BRR: Bit rate register
Function
Channel 1 clock input/output
Channel 1 receive data input
Channel 1 transmit data output
BRR
φ
Baud rate
φ/4
generator
φ/16
φ/64
TEI
TXI
RXI
ERI