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12.4
Operation
The timer W has the following operating modes.
• Normal Operation
• PWM Operation
12.4.1
Normal Operation
TCNT performs free-running or periodic counting operations. After a reset, TCNT is set as a free-
running counter. When the CTS bit in TMRW is set to 1, TCNT starts incrementing the count.
When the count overflows from H'FFFF to H'0000, the OVF flag in TSRW is set to 1. If the OVIE
in TIERW is set to 1, an interrupt request is generated. Figure 12.2 shows free-running counting.
H'FFFF
H'0000
CTS bit
OVF
Periodic counting operation can be performed when GRA is set as an output compare register and
bit CCLR in TCRW is set to 1. When the count matches GRA, TCNT is cleared to H'0000, the
IMFA flag in TSRW is set to 1. If the corresponding IMIEA bit in TIERW is set to 1, an interrupt
request is generated. TCNT continues counting from H'0000. Figure 12.3 shows periodic
counting.
Rev. 1.00, 11/03, page 164 of 376
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TCNT value
Figure 12.2 Free-Running Counter Operation
Time
Flag cleared
by software
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