Analog Mux Vboost; Adc - Texas Instruments MSPM0G350 Series Manual

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7.10.2 Switching Characteristics (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
t ,t Output rise/fall time
r f
t Output fall time
f

7.11 Analog Mux VBOOST

over operating free-air temperature range (unless otherwise noted)
PARAMETER
I VBOOST current adder
VBST
t VBOOST startup time
START,VBST

7.12 ADC

7.12.1 Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted), all TYP values are
measured at 25℃ and all accuracy parameters are measured using 12-bit resolution mode (unless otherwise noted)
PARAMETER
Vin Analog input voltage range
(ADC)
V Positive ADC reference voltage
R+
V Negative ADC reference voltage
R-
F ADC sampling frequency
S
Operating supply current
I
(ADC)
into VDD terminal
C ADC sample-and-hold capacitance
S/H
Rin ADC input resistance
ENOB Effective number of bits
SNR Signal-to-noise ratio
PSRR Power supply rejection ratio, DC
DC
PSRR Power supply rejection ratio, AC
AC
T ADC Wakeup Time
wakeup
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TEST CONDITIONS
All output ports
VDD ≥ 1.71V
except ODIO
ODIO VDD ≥ 1.71V, FM
(1)
Applies to all ADC analog input pins
V sourced from VDD
R+
V sourced from external reference pin (VREF+)
R+
V sourced from internal reference (VREF)
R+
RES = 0x0 (12-bit mode)
RES = 0x1 (10-bit mode)
RES = 0x2 (8-bit mode) , SCOMP = 2
F = 4MSPS, V
S R+
External reference
External reference
and 2bit shift
Internal reference, V
Internal reference, V
External reference
External reference
and 2bit shift
Internal reference, V
Internal reference, V
External reference
VDD = VDD to VDD
(min)
Internal reference, V
External reference
ΔVDD = 0.1 V at 1 kHz
Internal reference, V
Assumes internal reference is active
Product Folder Links: MSPM0G3507-Q1 MSPM0G3506-Q1 MSPM0G3505-Q1
MSPM0G3507-Q1, MSPM0G3506-Q1, MSPM0G3505-Q1
+
, CL= 20pF-100pF
TEST CONDITIONS
MCLK/ULPCLK is
LFCLK
MCLK/ULPCLK is
not LFCLK, SYSOSC
frequency is 4MHz
TEST CONDITIONS
= VDD
(3)
(4)
, HW Averaging Enabled, 16 Samples
(5)
= VREF = 2.5V (VRSEL = 1h)
R+
= VREF = 2.5V (VRSEL = 2h)
R+
(3)
(4)
, HW Averaging Enabled, 16 Samples
(5)
= VREF = 2.5V (VRSEL = 1h)
R+
= VREF = 2.5V (VRSEL = 2h)
R+
(3)
, VDD = VDD to VDD
(min) (max)
(max)
= VREF = 2.5V
R+
(3)
, ΔVDD = 0.1 V at 1 kHz
= VREF = 2.5V
R+
SLASF88 – OCTOBER 2023
MIN TYP MAX UNIT
0.3*f
20*VDD/5.5 120
MIN TYP MAX
0.7
10.6
12 20
MIN TYP MAX
0 VDD
VDD
1.4 VDD
VREF
0
5.3
(2)
1.5
3.3
0.5
10.9 11.1
12.3 12.5
9.9 10.8
9.2
68
78
66
57
62
53
61
52
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s
max
ns
UNIT
µA
us
UNIT
V
V
V
V
V
4
4 Msps
mA
pF
kΩ
bit
dB
dB
dB
5 us
39