Usb Device Resume Interrupt Status And Clear Register (Usbdrisc); Usb Device Resume Interrupt Status And Clear Register (Usbdrisc) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Register Descriptions
18.5.53 USB Device RESUME Interrupt Status and Clear Register (USBDRISC), offset 0x418
The USB device RESUME interrupt status and clear register (USBDRRIS) is the raw interrupt clear
register. On a write of 1, the corresponding interrupt is cleared. A write of 0 has no effect.
Mode(s): OTG A or Host
USBDRISC is shown in
Figure 18-64. USB Device RESUME Interrupt Status and Clear Register (USBDRISC)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-69. USB Device RESUME Interrupt Status and Clear Register (USBDRISC)
Bit Field Value
31-1 Reserved 0
0 RESUME
0
1
1404
M3 Universal Serial Bus (USB) Controller
OTG B or Device
Figure 18-64 and described in
Reserved
R-0
Field Descriptions
Description
Reserved. Reset is 0x0000.000.
RESUME Interrupt Status and Clear.
This bit is cleared by writing a 1. Clearing this bit also clears the RESUME bit in the USBDRCRIS
register.
The RESUME bits in the USBDRRIS and USBDRCIM registers are set, providing an interrupt to the
interrupt controller.
No interrupt has occurred or the interrupt is masked.
Copyright © 2012–2019, Texas Instruments Incorporated
Table 18-69.
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
0
RESUME
R/W1C
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