Register Descriptions
18.5.49 USB External Power Control Interrupt Mask Register (USBEPCIM), offset 0x408
The USB external power control interrupt mask 32-bit register (USBEPCIM) specifies the interrupt mask of
the two-pin external power interface.
Mode(s):
OTG A or Host
USBEPCIM is shown in
Figure 18-60. USB External Power Control Interrupt Mask Register (USBEPCIM)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-65. USB External Power Control Interrupt Mask Register (USBEPCIM) Field Descriptions
Bit
Field
Value
31-1
Reserved
0
0
PF
0
1
1400
M3 Universal Serial Bus (USB) Controller
OTG B or Device
Figure 18-59
and described in
Reserved
R-0
Description
Reserved
USB Power Fault Interrupt Mask.
The raw interrupt signal from a detected power fault is sent to the interrupt controller.
A detected power fault does not affect the interrupt status.
Copyright © 2012–2019, Texas Instruments Incorporated
Table
18-64.
SPRUHE8E – October 2012 – Revised November 2019
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1
0
PF
R-0