Analog Devices ADSP-BF506F Hardware Reference Manual page 1106

Overview
The processor features three dedicated input pins
the booting mode. The boot kernel evaluates the
booting from respective sources.
pins.
BMODE
Table 24-1. Booting Modes
Boot Source
BMODE2–0
000 No boot – idle
001
Boot from internal parallel flash
in asynchronous mode
010
Boot from internal parallel flash
in synchronous burst mode
011 Boot from external serial SPI
memory
100 Boot from SPI host
101 Boot from PPI host
24-2
Table 24-1
Description
The processor does not boot. Rather, the boot
kernel executes an IDLE instruction.
1 In this mode, conservative timing parameters are
used to communicate with the flash device. The
boot kernel communicates with the flash device
asynchronously.
1 In this mode, fast timing parameters are used to
communicate with the flash device. The boot ker-
nel configures the flash device for synchronous
burst communication and boots from the flash syn-
chronously.
After an initial device detection routine, the kernel
boots from either 8-bit, 16-bit, 24-bit or 32-bit
addressable SPI flash or EEPROM memory that
connects to
In this slave mode, the kernel expects the boot
stream to be applied to SPI0 by an external host
device.
In this boot mode, the kernel expects data to be
received over the 16-bit PPI port. Data transfers are
controlled with the incoming
processor uses the
it is ready to receive data and how much data is
expected.
ADSP-BF50x Blackfin Processor Hardware Reference
that select
BMODE[2:0]
pins and performs
BMODE
describes the modes of the
.
SPI0_SSEL1
PPI_FS1
signal to indicate when
PPI_FS2
signal. The