Sci3 Initialization; Serial Data Transmission - Renesas H8 Series Hardware Manual

Section 14 Serial Communication Interface 3 (SCI3)
14.5.2

SCI3 Initialization

Before transmitting and receiving data, SCI3 should be initialized as described in a sample
flowchart in figure 14.5.
14.5.3

Serial Data Transmission

Figure 14.11 shows an example of SCI3 operation for transmission in clocked synchronous mode.
In serial transmission, SCI3 operates as described below.
1. SCI3 monitors the TDRE flag in SSR, and if the flag is 0, SCI3 recognizes that data has been
written to TDR, and transfers the data from TDR to TSR.
2. SCI3 sets the TDRE flag to 1 and starts transmission. If the TIE bit in SCR3 is set to 1 at this
time, a transmit data empty interrupt (TXI) is generated.
3. 8-bit data is sent from the TXD pin synchronized with the output clock when output clock
mode has been specified, and synchronized with the input clock when use of an external clock
has been specified. Serial data is transmitted sequentially from the LSB (bit 0), from the TXD
pin.
4. SCI3 checks the TDRE flag at the timing for sending the MSB (bit 7).
5. If the TDRE flag is cleared to 0, data is transferred from TDR to TSR, and serial transmission
of the next frame is started.
6. If the TDRE flag is set to 1, the TEND flag in SSR is set to 1, and the TDRE flag maintains the
output state of the last bit. If the TEIE bit in SCR3 is set to 1 at this time, a TEI interrupt
request is generated.
7. The SCK3 pin is fixed high at the end of transmission.
Rev. 3.00 Sep. 14, 2006 Page 220 of 408
REJ09B0105-0300