Table 19.8 Scsmr Settings And Scif Communication Formats; Table 19.9 Scsmr And Scscr Settings And Scif Clock Source Selection - Renesas HD6417641 Hardware Manual

Section 19 Serial Communication Interface with FIFO (SCIF)

Table 19.8 SCSMR Settings and SCIF Communication Formats

SCSMR Settings
Bit 7 Bit 6 Bit 5
C/A CHR PE
0 0 0
1
1 0
1
1 * *
Note: *: Don't care

Table 19.9 SCSMR and SCSCR Settings and SCIF Clock Source Selection

SCSMR SCSCR
Settings
Bit 7 Bit 1 Bit 0
C/A CKE1 CKE0
0 0 0
1
1 0
1 0
*
1 0
Note: *: Don't care
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Bit 3
STOP Mode
0 Asynchronous
1
0
1
0
1
0
1
* Synchronous
Mode
Asynchronous
Synchronous
SCIF Communication Format
Data Length Parity Bit
8 bits Not set
Set
7 bits Not set
Set
8 bits Not set
SCIF Transmit/Receive Clock
Clock
Source SCK Pin Function
Internal SCIF does not use the SCK pin
Outputs a clock with a frequency 16 times
the bit rate
External Inputs a clock with frequency 16 times the
bit rate
Internal Outputs the serial clock
External Inputs the serial clock
Stop Bit Length
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
None