Operation; Figure 18.115 Falling Edge Detection Operation - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
Table of Contents

Advertisement

18.9.4

Operation

Input Level Detection Operation: If the input conditions set by the ICSR1 occur on any of the
POE0 to POE3 pins, all high-current pins become high-impedance state. However, only when the
general input/output function or MTU function is selected, the large-current pin is in the high-
impedance state.
1. Falling Edge Detection:
When a change from high to low level is input to the POE0 to POE3 pins, all high-current pins
become high-impedance state. Figure 18.115 shows the timing example for the POE0 to POE3
pins which enters the high-impedance state through input of a change from high to low level.
POE input
(0 to 3)
TIOC3B/
PTE[6]
Note: Other high-current pins (TIOC3D/PTE[4], TIOC4A/PTE[3], TIOC4B/PTE[2], TIOC4C/PTE[1], TIOC4D/PTE[0]) also
become the Hi-Z state at the same timing.
Pφ rising
Falling edge detected

Figure 18.115 Falling Edge Detection Operation

Section 18 Multi-Function Timer Pulse Unit (MTU)
Hi-Z state
Rev. 4.00 Sep. 14, 2005 Page 681 of 982
REJ09B0023-0400

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sh7641

Table of Contents