Renesas HD6417641 Hardware Manual page 67

No.
(BGA256) Pin Name
C6 A1
A4 A0/PTA[0]
D5 Vcc
B6 D15
D4 Vss
A3 VssQ
B4 D14
A2 VccQ
C3 D13
B5 D12
C5 D11
C4 D10
B3 D9
A1 D8
Notes: Treatment of unused pins: All the I/O buffers except PTG10, PTG9, and PTG 7 to PTG 0
(IIC2 and analog pins) have weak keepers. Weak-keeper circuits are provided on
input/output pins, and fix the pin inputs to high or low level when the pins are not driven
externally. Unused pins that are provided weak-keeper circuits need not to be fixed their
input levels. Fix unused pins that are not provided weak-keeper circuits to high or low level.
1. These pins are not real power supply for LSI, but each pin should be supplied each
specified voltage for correct action.
2. Weak-keeper circuits are not provided on the I/O buffer pins. Accordingly, pull the pins
up or down when they are not in use. Furthermore, do not apply intermediate voltages
to these pins when you are using them as port input pins.
3. H3 and H4 are a pair of power-supply pins located in the nearest position to the USB
module in this LSI.
Insert a bypass capacitor to the pair of pins to improve the electrical characteristic for
the USB input/output.
Description
Address bus
Address bus/Port A
Power supply (1.8V)
Data bus
Ground (0V)
Ground for I/O circuits (0V)
Data bus
Power supply for I/O circuits (3.3V)
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Section 1 Overview
Rev. 4.00 Sep. 14, 2005 Page 17 of 982
REJ09B0023-0400