Figure 3.16 Single Data-Transfer Operation Flow (Longword)
All data transfer operations are executed in the MA stage of the pipeline.
All data transfer operations do not update any condition code bits in DSR.
Pointer (R2, R3, R4, R5)
LAB [31:0]
Any memory areas
LDB [31:0]
X0
X1
A0
A1
Section 3 DSP Operation
–4, 0, +4, +R8
Y0
Y1
M0
M1
A0G
A1G
DSR
Cannot be specified
Rev. 4.00 Sep. 14, 2005 Page 121 of 982
REJ09B0023-0400