Interrupt Request Register 0 (Irr0) - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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Section 10 Interrupt Controller (INTC)
10.3.5

Interrupt Request Register 0 (IRR0)

IRR0 is an 8-bit register that indicates interrupt requests from external input pins IRQ7 to IRQ0.
This register is initialized to H'00 by a power-on reset or manual reset, but is not initialized in
standby mode.
Bit
Bit Name
7
IRQ7R
6
IRQ6R
5
IRQ5R
4
IRQ4R
3
IRQ3R
2
IRQ2R
1
IRQ1R
0
IRQ0R
Rev. 4.00 Sep. 14, 2005 Page 228 of 982
REJ09B0023-0400
Initial
Value
R/W
Description
0
R/W
IRQn Interrupt Request
0
R/W
Indicates whether there is interrupt request input to the
IRQn pin. When edge-detection mode is set for IRQn,
0
R/W
an interrupt request is cleared by writing 0 to the IRQnR
0
R/W
bit after reading IRQnR = 1.
When level-detection mode is set for IRQn, an interrupt
0
R/W
request is set/cleared by only 1/0 input to the IRQn pin.
0
R/W
0
R/W
IRQnR
0
R/W
0: No interrupt request input to IRQn pin
1: Interrupt request input to IRQn pin
n = 0 to 7

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