Renesas HD6417641 Hardware Manual page 754

Section 19 Serial Communication Interface with FIFO (SCIF)
Bit Bit Name
2 PER
Rev. 4.00 Sep. 14, 2005 Page 704 of 982
REJ09B0023-0400
Initial
value R/W Description
0 R Parity Error
Indicates a parity error in the data read from the next
receive FIFO data register (SCFRDR) in
asynchronous mode.
0: No receive parity error occurred in the next data
[Clearing conditions]
•
•
1: A receive parity error occurred in the data read
[Setting condition]
•
read from SCFRDR
PER is cleared to 0 when the chip undergoes a
power-on reset
PER is cleared to 0 when no parity error is present
in the next data read from SCFRDR
from SCFRDR
PER is set to 1 when a parity error is present in
the next data read from SCFRDR