Figure 3.2 Operation Sequence Example; Figure 3.3 Dc Bit Generation Examples In Carry Or Borrow Mode - Renesas HD6417641 Hardware Manual

Operation Sequence Example
PADD X0, Y0, A0
Slot
Stage
IF
ID
EX
MA/DSP
Every time an ALU arithmetic operation is executed, the DC, N, Z, V, and GT bits in DSR are
basically updated in accordance with the operation result. However, in case of a conditional
operation, they are not updated even though the specified condition is true and the operation is
executed. In case of an unconditional operation, they are always updated in accordance with the
operation result. The definition of a DC bit is selected by CS0 to CS2 (condition selection) bits in
DSR. The DC bit result is as follows:
Carry or Borrow Mode: CS[2:0] = 000: The DC bit indicates that carry or borrow is generated
from the most significant bit of the operation result, except the guard-bit parts. Some examples are
shown in figure 3.3. This mode is the default condition. When the input data is negative in a PABS
or PNEG instruction, carry is generated to add 1 to the LSB.
Guard bits
0000 0000
+)
0000 0000
0000 0001 0000 0000 0000 0000
Guard bits
0000 0000
–)
0000 0000
0000 0000 0000 0000 0000 0000
Borrow is not detected

Figure 3.3 DC Bit Generation Examples in Carry or Borrow Mode

MOVX.W @(R4, R8), X0
MOVX.W @R4+, X0
1 2
MOVX MOVX & PADD
MOVX
Previous cycle result is used.

Figure 3.2 Operation Sequence Example

Example 1
1111 1111 1111 1111
0000 0000 0000 0001
Carry detecting point
Carry is detected
Example 3
0000 0000 0000 0001
0000 0000 0000 0001
Borrow detecting point
3 4
MOVX & PADD
Addressing Addressing
MOVX
Example 2
Guard bits
1111 1111 0111
+)
0011 1111 0001
(1) 0011 1110 1000 0000 0000 0000
Carry is not detected
Example 4
Guard bits
0000 0000 0001
–)
0000 0000 0001
1111 1111 1111 1111 1111 1111
Borrow is detected
Rev. 4.00 Sep. 14, 2005 Page 101 of 982
Section 3 DSP Operation
5 6
MOVX & PADD
0000 0000 0000
0000 0000 0000
Carry detecting point
0000 0000 0001
0000 0000 0010
Borrow detecting point
REJ09B0023-0400