Renesas HD6417641 Hardware Manual page 332

Section 12 Bus State Controller (BSC)
Bit Bit Name
27 IWRWD2
26 IWRWD1
25 IWRWD0
24 IWRWS2
23 IWRWS1
22 IWRWS0
Rev. 4.00 Sep. 14, 2005 Page 282 of 982
REJ09B0023-0400
Initial
Value R/W Description
1 R/W Idle Cycles for Another Space Read-Write
1 R/W Specify the number of idle cycles to be inserted after
the access to a memory that is connected to the
1 R/W
space. The target access cycle is a read-write one in
which continuous accesses switch between different
spaces.
000: No idle cycle inserted
001: 1 idle cycle inserted
010: 2 idle cycles inserted
011: 4 idle cycles inserted
100: 6 idle cycles inserted
101: 8 idle cycles inserted
110: 10 idle cycles inserted
111: 12 idle cycles inserted
1 R/W Idle Cycles for Read-Write in the Same Space
1 R/W Specify the number of idle cycles to be inserted after
the access to a memory that is connected to the
1 R/W
space. The target cycle is a read-write cycle of which
continuous accesses are for the same space.
000: No idle cycle inserted
001: 1 idle cycle inserted
010: 2 idle cycles inserted
011: 4 idle cycles inserted
100: 6 idle cycles inserted
101: 8 idle cycles inserted
110: 10 idle cycles inserted
111: 12 idle cycles inserted