Figure 18.96 Error Occurrence In Pwm Mode 1, Recovery In Reset-Synchronous - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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(12) Operation when Error Occurs during PWM Mode 1 Operation, and Operation is
Restarted in Reset-Synchronous PWM Mode
Figure 18.96 shows an explanatory diagram of the case where an error occurs in PWM mode 1
and operation is restarted in reset-synchronous PWM mode after re-setting.
1
2
RESET
TMDR
(PWM1)
MTU module
output
TIOC3A
TIOC3B
TIOC3D
Port output
TIOC3A/PTE[7]
TIOC3B/PTE[6]
TIOC3D/PTE[4]
1 to 14 are the same as in figure 18.95.
15. Select the reset-synchronous PWM output level and cyclic output enabling/disabling with
TOCR.
16. Set reset-synchronous PWM.
17. Enable channel 3 and 4 output with TOER.
18. Set MTU output with the PFC.
19. Operation is restarted by TSTR.
3
4
5
6
7
TOER
TIOR
PFC
TSTR
Match
(1)
(1 init
(MTU)
(1)
0 out)
• Not initialized (TIOC3B)
• Not initialized (TIOC3D)
High-Z
High-Z
High-Z
Figure 18.96 Error Occurrence in PWM Mode 1,
Recovery in Reset-Synchronous PWM Mode
Section 18 Multi-Function Timer Pulse Unit (MTU)
8
9
10
11
12
Error
PFC
TSTR
TMDR
TIOR
occurs
(PORT)
(0)
(normal)
(0 init
0 out)
Rev. 4.00 Sep. 14, 2005 Page 655 of 982
13
14
15
16
17
TIOR
TOER
TOCR
TMDR
TOER
(disabled)
(0)
(RPWM)
(1)
REJ09B0023-0400
18
19
PFC
TSTR
(MTU)
(1)

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