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2
Section 16 I
C Bus Interface 2 (IIC2)
16.4
Operation
2
The I
C bus interface can communicate either in I
by setting FS in SAR.
2
16.4.1
I
C Bus Format
Figure 16.3 shows the I
following a start condition always consists of eight bits.
2
(a) I
C bus format (FS = 0)
S
SLA
R/W
1
7
1
1
2
(b) I
C bus format (Start condition retransmission, FS = 0)
S
SLA
R/W
1
7
1
1
SDA
SCL
S
Rev. 4.00 Sep. 14, 2005 Page 488 of 982
REJ09B0023-0400
2
C bus formats. Figure 16.4 shows the I
A
DATA
A
1
n
1
A
DATA
1
n1
m1
Figure 16.3 I
1-7
8
9
SLA
R/W
A
Figure 16.4 I
2
C bus mode or clocked synchronous serial mode
2
A/A
P
1
1
m
A/A
S
SLA
1
1
7
1
n1 and n2: Transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: Transfer frame count (m1 and m2 ≥ 1)
2
C Bus Formats
1-7
8
9
DATA
A
2
C Bus Timing
C bus timing. The first frame
n: Transfer bit count (n = 1 to 8)
m: Transfer frame count (m ≥ 1)
R/W
A
DATA
1
1
n2
m2
1-7
8
9
DATA
A
A/A
P
1
1
P
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