Figure 18.85 Error Occurrence In Normal Mode, Recovery In Normal Mode - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
Table of Contents

Advertisement

Section 18 Multi-Function Timer Pulse Unit (MTU)
(1)
Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in Normal Mode
Figure 18.85 shows an explanatory diagram of the case where an error occurs in normal mode and
operation is restarted in normal mode after re-setting.
1
RESET
TMDR
(normal)
MTU module
output
TIOC*A
TIOC*B
Port output
TIOC*A/PTE[n]
TIOC*B/PTE[n]
n = 0 to 15

Figure 18.85 Error Occurrence in Normal Mode, Recovery in Normal Mode

1. After a reset, MTU output is low and ports are in the high-impedance state.
2. After a reset, the TMDR setting is for normal mode.
3. For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
4. Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence.)
5. Set MTU output with the PFC.
6. The count operation is started by TSTR.
7. Output goes low on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR.
11. Not necessary when restarting in normal mode.
12. Initialize the pins with TIOR.
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
Rev. 4.00 Sep. 14, 2005 Page 644 of 982
REJ09B0023-0400
2
3
4
5
6
TOER
TIOR
PFC
TSTR
(1)
(1 init
(MTU)
(1)
0 out)
High-Z
High-Z
7
8
9
10
Match
Error
PFC
TSTR
TMDR
occurs
(PORT)
(0)
(normal)
11
12
13
14
TIOR
PFC
TSTR
(1 init
(MTU)
(1)
0 out)

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sh7641

Table of Contents