Register Descriptions; Compare Match Timer Start Register (Cmstr) - Renesas HD6417641 Hardware Manual

Section 17 Compare Match Timer (CMT)
17.2

Register Descriptions

The CMT has the following registers. Refer the section 24, List of Registers and access size for
these registers.
• Compare match timer start register_0 (CMSTR_0)
• Compare match timer control/status register_0 (CMCSR_0)
• Compare match counter_0 (CMCNT_0)
• Compare match timer constant register_0 (CMCOR_0)
• Compare match timer start register_1 (CMSTR_1)
• Compare match timer control/status register_1 (CMCSR_1)
• Compare match counter_1 (CMCNT_1)
• Compare match timer constant register_1 (CMCOR_1)
17.2.1

Compare Match Timer Start Register (CMSTR)

CMSTR is a 16-bit register that selects whether compare match counter (CMCNT) operates or is
stopped.
CMSTR is initialized to H'0000 by a power on reset, but is not initialized in standby mode.
Bit Bit Name

15 to 1
0 STR
Rev. 4.00 Sep. 14, 2005 Page 510 of 982
REJ09B0023-0400
Initial
value R/W Description
All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
0 R/W Count Start
Specifies whether compare match counter operates or
is stopped.
0: CMCNT count is stopped
1: CMCNT count is started